wifi-scripts: add multi-radio config support
[openwrt/staging/nbd.git] / target / linux / mediatek / dts / mt7986a-zyxel-ex5700-telenor.dts
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2
3 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/gpio/gpio.h>
7
8 #include "mt7986a.dtsi"
9
10 / {
11 model = "Zyxel EX5700 (Telenor)";
12 compatible = "zyxel,ex5700-telenor", "mediatek,mt7986a";
13
14 aliases {
15 serial0 = &uart0;
16 ethernet0 = &gmac0;
17 led-boot = &led_status_green;
18 led-failsafe = &led_status_green;
19 led-running = &led_status_green;
20 led-upgrade = &led_status_amber;
21 };
22
23 chosen {
24 stdout-path = "serial0:115200n8";
25
26 // Stock U-Boot crashes unless /chosen/bootargs exists
27 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8";
28 };
29
30 memory {
31 reg = <0 0x40000000 0 0x40000000>;
32 };
33
34 reg_3p3v: regulator-3p3v {
35 compatible = "regulator-fixed";
36 regulator-name = "fixed-3.3V";
37 regulator-min-microvolt = <3300000>;
38 regulator-max-microvolt = <3300000>;
39 regulator-boot-on;
40 regulator-always-on;
41 };
42
43 reg_5v: regulator-5v {
44 compatible = "regulator-fixed";
45 regulator-name = "fixed-5V";
46 regulator-min-microvolt = <5000000>;
47 regulator-max-microvolt = <5000000>;
48 regulator-boot-on;
49 regulator-always-on;
50 };
51
52
53 keys {
54 compatible = "gpio-keys";
55 poll-interval = <20>;
56
57 reset-button {
58 label = "reset";
59 gpios = <&pio 9 GPIO_ACTIVE_LOW>;
60 linux,code = <KEY_RESTART>;
61 };
62
63 wps-button {
64 label = "wps";
65 gpios = <&pio 10 GPIO_ACTIVE_LOW>;
66 linux,code = <KEY_WPS_BUTTON>;
67 };
68 };
69
70 leds {
71 compatible = "gpio-leds";
72
73 red1 {
74 label = "red:net";
75 gpios = <&pio 23 GPIO_ACTIVE_HIGH>;
76 default-state = "off";
77 };
78
79 green1 {
80 label = "green:net";
81 gpios = <&pio 25 GPIO_ACTIVE_HIGH>;
82 default-state = "off";
83 };
84
85 amber1 {
86 label = "amber:net";
87 gpios = <&pio 29 GPIO_ACTIVE_HIGH>;
88 default-state = "off";
89 };
90
91 white2 {
92 function = LED_FUNCTION_STATUS;
93 color = <LED_COLOR_ID_WHITE>;
94 gpios = <&pio 16 GPIO_ACTIVE_HIGH>;
95 default-state = "off";
96 };
97
98 red2 {
99 function = LED_FUNCTION_STATUS;
100 color = <LED_COLOR_ID_RED>;
101 gpios = <&pio 17 GPIO_ACTIVE_HIGH>;
102 default-state = "off";
103 };
104
105 led_status_green: green2 {
106 function = LED_FUNCTION_STATUS;
107 color = <LED_COLOR_ID_GREEN>;
108 gpios = <&pio 31 GPIO_ACTIVE_HIGH>;
109 default-state = "off";
110 };
111
112 led_status_amber: amber2 {
113 function = LED_FUNCTION_STATUS;
114 color = <LED_COLOR_ID_AMBER>;
115 gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
116 default-state = "off";
117 };
118 };
119
120 };
121
122 &eth {
123 status = "okay";
124 pinctrl-names = "default";
125 pinctrl-0 = <&eth_pins>;
126
127 gmac0: mac@0 {
128 compatible = "mediatek,eth-mac";
129 reg = <0>;
130 phy-mode = "2500base-x";
131
132 fixed-link {
133 speed = <2500>;
134 full-duplex;
135 pause;
136 };
137 };
138
139 mac@1 {
140 compatible = "mediatek,eth-mac";
141 reg = <1>;
142 label = "wan";
143 phy-mode = "2500base-x";
144 phy-handle = <&phy6>;
145 };
146
147 mdio: mdio-bus {
148 #address-cells = <1>;
149 #size-cells = <0>;
150 };
151 };
152
153 &mdio {
154 reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
155 reset-delay-us = <50000>;
156 reset-post-delay-us = <20000>;
157
158 phy5: phy@5 {
159 compatible = "ethernet-phy-ieee802.3-c45";
160 reg = <5>;
161 mxl,led-config = <0x3f0 0x330 0x0 0x0>;
162 };
163
164 phy6: phy@6 {
165 compatible = "ethernet-phy-ieee802.3-c45";
166 reg = <6>;
167 mxl,led-config = <0x3f0 0x330 0x0 0x0>;
168 };
169
170 switch: switch@1f {
171 compatible = "mediatek,mt7531";
172 reg = <31>;
173 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
174 interrupt-controller;
175 #interrupt-cells = <1>;
176 interrupt-parent = <&pio>;
177 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
178 };
179 };
180
181 &switch {
182 ports {
183 #address-cells = <1>;
184 #size-cells = <0>;
185
186 port@0 {
187 reg = <0>;
188 label = "lan3";
189 };
190
191 port@1 {
192 reg = <1>;
193 label = "lan2";
194 };
195
196 port@2 {
197 reg = <2>;
198 label = "lan1";
199 };
200
201 port@5 {
202 reg = <5>;
203 label = "lan4";
204 phy-mode = "2500base-x";
205 phy-handle = <&phy5>;
206 };
207
208 port@6 {
209 reg = <6>;
210 ethernet = <&gmac0>;
211 phy-mode = "2500base-x";
212
213 fixed-link {
214 speed = <2500>;
215 full-duplex;
216 pause;
217 };
218 };
219 };
220 };
221
222 &crypto {
223 status = "okay";
224 };
225
226 &pcie {
227 pinctrl-names = "default";
228 pinctrl-0 = <&pcie_pins>;
229 status = "okay";
230
231 pcie@0,0 {
232 reg = <0x0000 0 0 0 0>;
233
234 wifi@0,0 {
235 compatible = "mediatek,mt76";
236 reg = <0x0000 0 0 0 0>;
237 mediatek,mtd-eeprom = <&factory 0xa0000>;
238 };
239 };
240 };
241
242 &pcie_phy {
243 status = "okay";
244 };
245
246 &watchdog {
247 status = "okay";
248 };
249
250 &wifi {
251 status = "okay";
252 pinctrl-names = "default";
253 pinctrl-0 = <&wf_5g_pins>;
254
255 mediatek,mtd-eeprom = <&factory 0x0>;
256 };
257
258 &pio {
259 eth_pins: eth-pins {
260 mux {
261 function = "eth";
262 groups = "switch_int", "mdc_mdio";
263 };
264 };
265
266 pcie_pins: pcie-pins {
267 mux {
268 function = "pcie";
269 groups = "pcie_pereset"; // "pcie_clk" and "pcie_wake" is unused?
270 };
271 };
272
273 spi_flash_pins: spi-flash-pins-33-to-38 {
274 mux {
275 function = "spi";
276 groups = "spi0", "spi0_wp_hold";
277 };
278 conf-pu {
279 pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
280 drive-strength = <8>;
281 mediatek,pull-up-adv = <0>; /* bias-disable */
282 };
283 conf-pd {
284 pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
285 drive-strength = <8>;
286 mediatek,pull-down-adv = <0>; /* bias-disable */
287 };
288 };
289
290 wf_5g_pins: wf_5g-pins {
291 mux {
292 function = "wifi";
293 groups = "wf_5g";
294 };
295 conf {
296 pins = "WF1_HB1", "WF1_HB2", "WF1_HB3", "WF1_HB4",
297 "WF1_HB0", "WF1_HB5", "WF1_HB6", "WF1_HB7",
298 "WF1_HB8", "WF1_TOP_CLK", "WF1_TOP_DATA";
299 drive-strength = <4>;
300 };
301 };
302
303 };
304
305 &spi0 {
306 pinctrl-names = "default";
307 pinctrl-0 = <&spi_flash_pins>;
308 cs-gpios = <0>, <0>;
309 status = "okay";
310
311 flash@0 {
312 compatible = "jedec,spi-nor";
313 reg = <0>;
314 spi-max-frequency = <20000000>;
315 };
316
317 flash@1 {
318 compatible = "spi-nand";
319 reg = <1>;
320
321 mediatek,nmbm;
322 mediatek,bmt-max-ratio = <1>;
323 mediatek,bmt-max-reserved-blocks = <64>;
324
325 spi-max-frequency = <20000000>;
326 spi-tx-bus-width = <4>;
327 spi-rx-bus-width = <4>;
328
329 partitions {
330 compatible = "fixed-partitions";
331 #address-cells = <1>;
332 #size-cells = <1>;
333
334 partition@0 {
335 label = "BL2";
336 reg = <0x000000 0x100000>;
337 read-only;
338 };
339 partition@100000 {
340 label = "u-boot-env";
341 reg = <0x100000 0x80000>;
342 };
343 factory: partition@180000 {
344 label = "Factory";
345 reg = <0x180000 0x200000>;
346 read-only;
347 };
348 partition@380000 {
349 label = "FIP";
350 reg = <0x380000 0x200000>;
351 read-only;
352 };
353 partition@580000 {
354 label = "ubi";
355 reg = <0x580000 0x1da80000>;
356 };
357 };
358 };
359 };
360
361 &ssusb {
362 vusb33-supply = <&reg_3p3v>;
363 vbus-supply = <&reg_5v>;
364 status = "okay";
365 };
366
367 &trng {
368 status = "okay";
369 };
370
371 &uart0 {
372 status = "okay";
373 };
374
375 &usb_phy {
376 status = "okay";
377 };