1 // SPDX-License-Identifier: (GL-2.0 OR MIT)
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h>
7 #include "mt7986b.dtsi"
10 compatible = "mercusys,mr90x-v1", "mediatek,mt7986b";
11 model = "Mercusys MR90X v1";
16 led-boot = &led_status_green;
17 led-failsafe = &led_status_green;
18 led-running = &led_status_green;
19 led-upgrade = &led_status_green;
23 stdout-path = "serial0:115200n8";
27 reg = <0 0x40000000 0 0x20000000>;
31 compatible = "gpio-keys";
35 gpios = <&pio 10 GPIO_ACTIVE_LOW>;
36 linux,code = <KEY_RESTART>;
41 compatible = "gpio-leds";
45 gpios = <&pio 7 GPIO_ACTIVE_LOW>;
50 gpios = <&pio 9 GPIO_ACTIVE_LOW>;
55 gpios = <&pio 12 GPIO_ACTIVE_LOW>;
60 gpios = <&pio 13 GPIO_ACTIVE_LOW>;
64 label = "orange:status";
65 gpios = <&pio 16 GPIO_ACTIVE_HIGH>;
68 led_status_green: led-5 {
69 label = "green:status";
70 gpios = <&pio 17 GPIO_ACTIVE_HIGH>;
84 compatible = "mediatek,eth-mac";
86 phy-mode = "2500base-x";
96 compatible = "mediatek,eth-mac";
99 phy-mode = "2500base-x";
103 #address-cells = <1>;
109 #address-cells = <1>;
112 reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
113 reset-delay-us = <1500000>;
114 reset-post-delay-us = <1000000>;
116 /* WAN/LAN 2.5Gbps phy
117 MaxLinear GPY211C0VC (SLNW8) */
119 compatible = "ethernet-phy-ieee802.3-c45";
124 compatible = "mediatek,mt7531";
126 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
132 #address-cells = <1>;
135 /* WAN/LAN 1Gbps port */
156 phy-mode = "2500base-x";
168 spi_flash_pins: spi-flash-pins-33-to-38 {
171 groups = "spi0", "spi0_wp_hold";
174 pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
175 drive-strength = <8>;
176 mediatek,pull-up-adv = <0>; /* bias-disable */
179 pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
180 drive-strength = <8>;
181 mediatek,pull-down-adv = <0>; /* bias-disable */
185 wf_2g_5g_pins: wf_2g_5g-pins {
188 groups = "wf_2g", "wf_5g";
191 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
192 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
193 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
194 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
195 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
196 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
197 "WF1_TOP_CLK", "WF1_TOP_DATA";
198 drive-strength = <4>;
204 pinctrl-names = "default";
205 pinctrl-0 = <&spi_flash_pins>;
208 spi_nand_flash: flash@0 {
209 compatible = "spi-nand";
210 #address-cells = <1>;
214 spi-max-frequency = <20000000>;
215 spi-tx-bus-width = <4>;
216 spi-rx-bus-width = <4>;
218 partitions: partitions {
219 compatible = "fixed-partitions";
220 #address-cells = <1>;
225 reg = <0x0 0x200000>;
230 label = "u-boot-env";
231 reg = <0x200000 0x100000>;
236 reg = <0x300000 0x3200000>;
241 reg = <0x3500000 0x3200000>;
246 label = "userconfig";
247 reg = <0x6700000 0x800000>;
253 reg = <0x6f00000 0x400000>;
274 pinctrl-names = "default";
275 pinctrl-0 = <&wf_2g_5g_pins>;