2 * Copyright (C) 2013 Realtek Semiconductor Corp.
5 * Unless you and Realtek execute a separate written software license
6 * agreement governing use of this software, this software is licensed
7 * to you under the terms of the GNU General Public License version 2,
8 * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
11 * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
13 * Purpose : RTK switch high-level API for RTL8367/RTL8367C
14 * Feature : Here is a list of all functions and variables in Port module.
18 #include <rtk_switch.h>
19 #include <rtk_error.h>
23 #include <rtl8367c_asicdrv.h>
24 #include <rtl8367c_asicdrv_port.h>
25 #include <rtl8367c_asicdrv_misc.h>
26 #include <rtl8367c_asicdrv_portIsolation.h>
28 #define FIBER_INIT_SIZE 1507
29 CONST_T rtk_uint8 Fiber
[FIBER_INIT_SIZE
] = {
30 0x02,0x04,0x41,0xE4,0xF5,0xA8,0xD2,0xAF,
31 0x22,0x00,0x00,0x02,0x05,0x2D,0xE4,0x90,
32 0x06,0x2A,0xF0,0xFD,0x7C,0x01,0x7F,0x3F,
33 0x7E,0x1D,0x12,0x05,0xAF,0x7D,0x40,0x12,
34 0x02,0x5F,0xE4,0xFF,0xFE,0xFD,0x80,0x08,
35 0x12,0x05,0x9E,0x50,0x0C,0x12,0x05,0x8B,
36 0xFC,0x90,0x06,0x24,0x12,0x03,0x76,0x80,
37 0xEF,0xE4,0xF5,0xA8,0xD2,0xAF,0x7D,0x1F,
38 0xFC,0x7F,0x49,0x7E,0x13,0x12,0x05,0xAF,
39 0x12,0x05,0xD6,0x7D,0xD7,0x12,0x02,0x1E,
40 0x7D,0x80,0x12,0x01,0xCA,0x7D,0x94,0x7C,
41 0xF9,0x12,0x02,0x3B,0x7D,0x81,0x12,0x01,
42 0xCA,0x7D,0xA2,0x7C,0x31,0x12,0x02,0x3B,
43 0x7D,0x82,0x12,0x01,0xDF,0x7D,0x60,0x7C,
44 0x69,0x12,0x02,0x43,0x7D,0x83,0x12,0x01,
45 0xDF,0x7D,0x28,0x7C,0x97,0x12,0x02,0x43,
46 0x7D,0x84,0x12,0x01,0xF4,0x7D,0x85,0x7C,
47 0x9D,0x12,0x02,0x57,0x7D,0x23,0x12,0x01,
48 0xF4,0x7D,0x10,0x7C,0xD8,0x12,0x02,0x57,
49 0x7D,0x24,0x7C,0x04,0x12,0x02,0x28,0x7D,
50 0x00,0x12,0x02,0x1E,0x7D,0x2F,0x12,0x02,
51 0x09,0x7D,0x20,0x7C,0x0F,0x7F,0x02,0x7E,
52 0x66,0x12,0x05,0xAF,0x7D,0x01,0x12,0x02,
53 0x09,0x7D,0x04,0x7C,0x00,0x7F,0x01,0x7E,
54 0x66,0x12,0x05,0xAF,0x7D,0x80,0x7C,0x00,
55 0x7F,0x00,0x7E,0x66,0x12,0x05,0xAF,0x7F,
56 0x02,0x7E,0x66,0x12,0x02,0x4B,0x44,0x02,
57 0xFF,0x90,0x06,0x28,0xEE,0xF0,0xA3,0xEF,
58 0xF0,0x44,0x04,0xFF,0x90,0x06,0x28,0xEE,
59 0xF0,0xFC,0xA3,0xEF,0xF0,0xFD,0x7F,0x02,
60 0x7E,0x66,0x12,0x05,0xAF,0x7D,0x04,0x7C,
61 0x00,0x12,0x02,0x28,0x7D,0xB9,0x7C,0x15,
62 0x7F,0xEB,0x7E,0x13,0x12,0x05,0xAF,0x7D,
63 0x07,0x7C,0x00,0x7F,0xE7,0x7E,0x13,0x12,
64 0x05,0xAF,0x7D,0x40,0x7C,0x11,0x7F,0x00,
65 0x7E,0x62,0x12,0x05,0xAF,0x12,0x03,0x82,
66 0x7D,0x41,0x12,0x02,0x5F,0xE4,0xFF,0xFE,
67 0xFD,0x80,0x08,0x12,0x05,0x9E,0x50,0x0C,
68 0x12,0x05,0x8B,0xFC,0x90,0x06,0x24,0x12,
69 0x03,0x76,0x80,0xEF,0xC2,0x00,0xC2,0x01,
70 0xD2,0xA9,0xD2,0x8C,0x7F,0x01,0x7E,0x62,
71 0x12,0x02,0x4B,0x30,0xE2,0x05,0xE4,0xA3,
72 0xF0,0x80,0xF1,0x90,0x06,0x2A,0xE0,0x70,
73 0x12,0x12,0x01,0x89,0x90,0x06,0x2A,0x74,
74 0x01,0xF0,0xE4,0x90,0x06,0x2D,0xF0,0xA3,
75 0xF0,0x80,0xD9,0xC3,0x90,0x06,0x2E,0xE0,
76 0x94,0x64,0x90,0x06,0x2D,0xE0,0x94,0x00,
77 0x40,0xCA,0xE4,0xF0,0xA3,0xF0,0x12,0x01,
78 0x89,0x90,0x06,0x2A,0x74,0x01,0xF0,0x80,
79 0xBB,0x7D,0x04,0xFC,0x7F,0x02,0x7E,0x66,
80 0x12,0x05,0xAF,0x7D,0x00,0x7C,0x04,0x7F,
81 0x01,0x7E,0x66,0x12,0x05,0xAF,0x7D,0xC0,
82 0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,0x05,
83 0xAF,0xE4,0xFD,0xFC,0x7F,0x02,0x7E,0x66,
84 0x12,0x05,0xAF,0x7D,0x00,0x7C,0x04,0x7F,
85 0x01,0x7E,0x66,0x12,0x05,0xAF,0x7D,0xC0,
86 0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,0x05,
87 0xAF,0x22,0x7C,0x04,0x7F,0x01,0x7E,0x66,
88 0x12,0x05,0xAF,0x7D,0xC0,0x7C,0x00,0x7F,
89 0x00,0x7E,0x66,0x12,0x05,0xAF,0x22,0x7C,
90 0x04,0x7F,0x01,0x7E,0x66,0x12,0x05,0xAF,
91 0x7D,0xC0,0x7C,0x00,0x7F,0x00,0x7E,0x66,
92 0x12,0x05,0xAF,0x22,0x7C,0x04,0x7F,0x01,
93 0x7E,0x66,0x12,0x05,0xAF,0x7D,0xC0,0x7C,
94 0x00,0x7F,0x00,0x7E,0x66,0x12,0x05,0xAF,
95 0x22,0x7C,0x00,0x7F,0x01,0x7E,0x66,0x12,
96 0x05,0xAF,0x7D,0xC0,0x7C,0x00,0x7F,0x00,
97 0x7E,0x66,0x12,0x05,0xAF,0x22,0x7C,0x04,
98 0x7F,0x02,0x7E,0x66,0x12,0x05,0xAF,0x22,
99 0x7F,0x01,0x7E,0x66,0x12,0x05,0xAF,0x7D,
100 0xC0,0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,
101 0x05,0xAF,0x22,0x7F,0x02,0x7E,0x66,0x12,
102 0x05,0xAF,0x22,0x7F,0x02,0x7E,0x66,0x12,
103 0x05,0xAF,0x22,0x12,0x05,0x67,0x90,0x06,
104 0x28,0xEE,0xF0,0xA3,0xEF,0xF0,0x22,0x7F,
105 0x02,0x7E,0x66,0x12,0x05,0xAF,0x22,0x7C,
106 0x00,0x7F,0x36,0x7E,0x13,0x12,0x05,0xAF,
107 0x22,0xC5,0xF0,0xF8,0xA3,0xE0,0x28,0xF0,
108 0xC5,0xF0,0xF8,0xE5,0x82,0x15,0x82,0x70,
109 0x02,0x15,0x83,0xE0,0x38,0xF0,0x22,0x75,
110 0xF0,0x08,0x75,0x82,0x00,0xEF,0x2F,0xFF,
111 0xEE,0x33,0xFE,0xCD,0x33,0xCD,0xCC,0x33,
112 0xCC,0xC5,0x82,0x33,0xC5,0x82,0x9B,0xED,
113 0x9A,0xEC,0x99,0xE5,0x82,0x98,0x40,0x0C,
114 0xF5,0x82,0xEE,0x9B,0xFE,0xED,0x9A,0xFD,
115 0xEC,0x99,0xFC,0x0F,0xD5,0xF0,0xD6,0xE4,
116 0xCE,0xFB,0xE4,0xCD,0xFA,0xE4,0xCC,0xF9,
117 0xA8,0x82,0x22,0xB8,0x00,0xC1,0xB9,0x00,
118 0x59,0xBA,0x00,0x2D,0xEC,0x8B,0xF0,0x84,
119 0xCF,0xCE,0xCD,0xFC,0xE5,0xF0,0xCB,0xF9,
120 0x78,0x18,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
121 0xED,0x33,0xFD,0xEC,0x33,0xFC,0xEB,0x33,
122 0xFB,0x10,0xD7,0x03,0x99,0x40,0x04,0xEB,
123 0x99,0xFB,0x0F,0xD8,0xE5,0xE4,0xF9,0xFA,
124 0x22,0x78,0x18,0xEF,0x2F,0xFF,0xEE,0x33,
125 0xFE,0xED,0x33,0xFD,0xEC,0x33,0xFC,0xC9,
126 0x33,0xC9,0x10,0xD7,0x05,0x9B,0xE9,0x9A,
127 0x40,0x07,0xEC,0x9B,0xFC,0xE9,0x9A,0xF9,
128 0x0F,0xD8,0xE0,0xE4,0xC9,0xFA,0xE4,0xCC,
129 0xFB,0x22,0x75,0xF0,0x10,0xEF,0x2F,0xFF,
130 0xEE,0x33,0xFE,0xED,0x33,0xFD,0xCC,0x33,
131 0xCC,0xC8,0x33,0xC8,0x10,0xD7,0x07,0x9B,
132 0xEC,0x9A,0xE8,0x99,0x40,0x0A,0xED,0x9B,
133 0xFD,0xEC,0x9A,0xFC,0xE8,0x99,0xF8,0x0F,
134 0xD5,0xF0,0xDA,0xE4,0xCD,0xFB,0xE4,0xCC,
135 0xFA,0xE4,0xC8,0xF9,0x22,0xEB,0x9F,0xF5,
136 0xF0,0xEA,0x9E,0x42,0xF0,0xE9,0x9D,0x42,
137 0xF0,0xE8,0x9C,0x45,0xF0,0x22,0xE0,0xFC,
138 0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,
139 0xFF,0x22,0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,
140 0xE0,0xFA,0xA3,0xE0,0xFB,0x22,0xEC,0xF0,
141 0xA3,0xED,0xF0,0xA3,0xEE,0xF0,0xA3,0xEF,
142 0xF0,0x22,0x12,0x03,0xF8,0x12,0x04,0x1A,
143 0x44,0x40,0x12,0x04,0x0F,0x7D,0x03,0x7C,
144 0x00,0x12,0x04,0x23,0x12,0x05,0xAF,0x12,
145 0x03,0xF8,0x12,0x04,0x1A,0x54,0xBF,0x12,
146 0x04,0x0F,0x7D,0x03,0x7C,0x00,0x12,0x03,
147 0xD0,0x7F,0x02,0x7E,0x66,0x12,0x05,0x67,
148 0xEF,0x54,0xFD,0x54,0xFE,0x12,0x04,0x33,
149 0x12,0x03,0xD0,0x7F,0x02,0x7E,0x66,0x12,
150 0x05,0x67,0xEF,0x44,0x02,0x44,0x01,0x12,
151 0x04,0x33,0x12,0x04,0x23,0x02,0x05,0xAF,
152 0x7F,0x01,0x7E,0x66,0x12,0x05,0xAF,0x7D,
153 0xC0,0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,
154 0x05,0xAF,0xE4,0xFD,0xFC,0x7F,0x01,0x7E,
155 0x66,0x12,0x05,0xAF,0x7D,0x80,0x7C,0x00,
156 0x7F,0x00,0x7E,0x66,0x12,0x05,0xAF,0x22,
157 0x7D,0x03,0x7C,0x00,0x7F,0x01,0x7E,0x66,
158 0x12,0x05,0xAF,0x7D,0x80,0x7C,0x00,0x7F,
159 0x00,0x7E,0x66,0x12,0x05,0xAF,0x22,0xFD,
160 0xAC,0x06,0x7F,0x02,0x7E,0x66,0x12,0x05,
161 0xAF,0x22,0x7F,0x02,0x7E,0x66,0x12,0x05,
162 0x67,0xEF,0x22,0x7F,0x01,0x7E,0x66,0x12,
163 0x05,0xAF,0x7D,0xC0,0x7C,0x00,0x7F,0x00,
164 0x7E,0x66,0x22,0xFD,0xAC,0x06,0x7F,0x02,
165 0x7E,0x66,0x12,0x05,0xAF,0xE4,0xFD,0xFC,
166 0x22,0x78,0x7F,0xE4,0xF6,0xD8,0xFD,0x75,
167 0x81,0x3C,0x02,0x04,0x88,0x02,0x00,0x0E,
168 0xE4,0x93,0xA3,0xF8,0xE4,0x93,0xA3,0x40,
169 0x03,0xF6,0x80,0x01,0xF2,0x08,0xDF,0xF4,
170 0x80,0x29,0xE4,0x93,0xA3,0xF8,0x54,0x07,
171 0x24,0x0C,0xC8,0xC3,0x33,0xC4,0x54,0x0F,
172 0x44,0x20,0xC8,0x83,0x40,0x04,0xF4,0x56,
173 0x80,0x01,0x46,0xF6,0xDF,0xE4,0x80,0x0B,
174 0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,
175 0x90,0x05,0xCB,0xE4,0x7E,0x01,0x93,0x60,
176 0xBC,0xA3,0xFF,0x54,0x3F,0x30,0xE5,0x09,
177 0x54,0x1F,0xFE,0xE4,0x93,0xA3,0x60,0x01,
178 0x0E,0xCF,0x54,0xC0,0x25,0xE0,0x60,0xA8,
179 0x40,0xB8,0xE4,0x93,0xA3,0xFA,0xE4,0x93,
180 0xA3,0xF8,0xE4,0x93,0xA3,0xC8,0xC5,0x82,
181 0xC8,0xCA,0xC5,0x83,0xCA,0xF0,0xA3,0xC8,
182 0xC5,0x82,0xC8,0xCA,0xC5,0x83,0xCA,0xDF,
183 0xE9,0xDE,0xE7,0x80,0xBE,0x75,0x0F,0x80,
184 0x75,0x0E,0x7E,0x75,0x0D,0xAA,0x75,0x0C,
185 0x83,0xE4,0xF5,0x10,0x75,0x0B,0xA0,0x75,
186 0x0A,0xAC,0x75,0x09,0xB9,0x75,0x08,0x03,
187 0x75,0x89,0x11,0x7B,0x60,0x7A,0x09,0xF9,
188 0xF8,0xAF,0x0B,0xAE,0x0A,0xAD,0x09,0xAC,
189 0x08,0x12,0x02,0xBB,0xAD,0x07,0xAC,0x06,
190 0xC3,0xE4,0x9D,0xFD,0xE4,0x9C,0xFC,0x78,
191 0x17,0xF6,0xAF,0x05,0xEF,0x08,0xF6,0x18,
192 0xE6,0xF5,0x8C,0x08,0xE6,0xF5,0x8A,0x74,
193 0x0D,0x2D,0xFD,0xE4,0x3C,0x18,0xF6,0xAF,
194 0x05,0xEF,0x08,0xF6,0x75,0x88,0x10,0x53,
195 0x8E,0xC7,0xD2,0xA9,0x22,0xC0,0xE0,0xC0,
196 0xF0,0xC0,0x83,0xC0,0x82,0xC0,0xD0,0x75,
197 0xD0,0x00,0xC0,0x00,0x78,0x17,0xE6,0xF5,
198 0x8C,0x78,0x18,0xE6,0xF5,0x8A,0x90,0x06,
199 0x2B,0xE4,0x75,0xF0,0x01,0x12,0x02,0x69,
200 0x90,0x06,0x2D,0xE4,0x75,0xF0,0x01,0x12,
201 0x02,0x69,0xD0,0x00,0xD0,0xD0,0xD0,0x82,
202 0xD0,0x83,0xD0,0xF0,0xD0,0xE0,0x32,0xC2,
203 0xAF,0xAD,0x07,0xAC,0x06,0x8C,0xA2,0x8D,
204 0xA3,0x75,0xA0,0x01,0x00,0x00,0x00,0x00,
205 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xAE,
206 0xA1,0xBE,0x00,0xF0,0xAE,0xA6,0xAF,0xA7,
207 0xD2,0xAF,0x22,0x90,0x06,0x24,0x12,0x03,
208 0x5E,0xEF,0x24,0x01,0xFF,0xE4,0x3E,0xFE,
209 0xE4,0x3D,0xFD,0xE4,0x3C,0x22,0xE4,0x7F,
210 0x20,0x7E,0x4E,0xFD,0xFC,0x90,0x06,0x24,
211 0x12,0x03,0x6A,0xC3,0x02,0x03,0x4D,0xC2,
212 0xAF,0xAB,0x07,0xAA,0x06,0x8A,0xA2,0x8B,
213 0xA3,0x8C,0xA4,0x8D,0xA5,0x75,0xA0,0x03,
214 0x00,0x00,0x00,0xAA,0xA1,0xBA,0x00,0xF8,
215 0xD2,0xAF,0x22,0x42,0x06,0x2D,0x00,0x00,
216 0x42,0x06,0x2B,0x00,0x00,0x00,0x12,0x05,
217 0xDF,0x12,0x04,0xCD,0x02,0x00,0x03,0xE4,
220 static rtk_api_ret_t
_rtk_port_FiberModeAbility_set(rtk_port_t port
, rtk_port_phy_ability_t
*pAbility
)
222 rtk_api_ret_t retVal
;
225 /* Check Combo port or not */
226 RTK_CHK_PORT_IS_COMBO(port
);
229 if ((retVal
= rtl8367c_getAsicReg(RTL8367C_REG_FIB0_CFG04
, ®Data
)) != RT_ERR_OK
)
232 if (pAbility
->AsyFC
== 1)
233 regData
|= (0x0001 << 8);
235 regData
&= ~(0x0001 << 8);
237 if (pAbility
->FC
== 1)
238 regData
|= (0x0001 << 7);
240 regData
&= ~(0x0001 << 7);
242 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG04
, regData
)) != RT_ERR_OK
)
246 if( (pAbility
->Full_1000
== 1) && (pAbility
->Full_100
== 1) && (pAbility
->AutoNegotiation
== 1) )
248 if ((retVal
= rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1
, RTL8367C_SDS_FRC_MODE_OFFSET
, 0)) != RT_ERR_OK
)
251 if ((retVal
= rtl8367c_setAsicRegBits(RTL8367C_REG_FIBER_CFG_1
, RTL8367C_SDS_MODE_MASK
, 7)) != RT_ERR_OK
)
254 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG00
, 0x1140)) != RT_ERR_OK
)
257 else if(pAbility
->Full_1000
== 1)
259 if ((retVal
= rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1
, RTL8367C_SDS_FRC_MODE_OFFSET
, 1)) != RT_ERR_OK
)
262 if ((retVal
= rtl8367c_setAsicRegBits(RTL8367C_REG_FIBER_CFG_1
, RTL8367C_SDS_MODE_MASK
, 4)) != RT_ERR_OK
)
265 if(pAbility
->AutoNegotiation
== 1)
267 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG00
, 0x1140)) != RT_ERR_OK
)
272 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG00
, 0x0140)) != RT_ERR_OK
)
276 else if(pAbility
->Full_100
== 1)
278 if ((retVal
= rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1
, RTL8367C_SDS_FRC_MODE_OFFSET
, 1)) != RT_ERR_OK
)
281 if ((retVal
= rtl8367c_setAsicRegBits(RTL8367C_REG_FIBER_CFG_1
, RTL8367C_SDS_MODE_MASK
, 5)) != RT_ERR_OK
)
284 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG00
, 0x2100)) != RT_ERR_OK
)
288 /* Digital software reset */
289 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR
, 0x0003)) != RT_ERR_OK
)
292 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD
, 0x0080)) != RT_ERR_OK
)
295 if ((retVal
= rtl8367c_getAsicReg(RTL8367C_REG_SDS_INDACS_DATA
, ®Data
)) != RT_ERR_OK
)
298 regData
|= (0x0001 << 6);
300 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA
, regData
)) != RT_ERR_OK
)
303 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR
, 0x0003)) != RT_ERR_OK
)
306 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD
, 0x00C0)) != RT_ERR_OK
)
309 regData
&= ~(0x0001 << 6);
311 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA
, regData
)) != RT_ERR_OK
)
314 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR
, 0x0003)) != RT_ERR_OK
)
317 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD
, 0x00C0)) != RT_ERR_OK
)
321 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA
, 0x1401))!=RT_ERR_OK
)
324 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR
, 0x0000))!=RT_ERR_OK
)
327 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD
, 0x00C0))!=RT_ERR_OK
)
330 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA
, 0x1403))!=RT_ERR_OK
)
333 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR
, 0x0000))!=RT_ERR_OK
)
336 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD
, 0x00C0))!=RT_ERR_OK
)
342 static rtk_api_ret_t
_rtk_port_FiberModeAbility_get(rtk_port_t port
, rtk_port_phy_ability_t
*pAbility
)
344 rtk_api_ret_t retVal
;
345 rtk_uint32 data
, regData
;
347 /* Check Combo port or not */
348 RTK_CHK_PORT_IS_COMBO(port
);
350 memset(pAbility
, 0x00, sizeof(rtk_port_phy_ability_t
));
353 if ((retVal
= rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1
, RTL8367C_SDS_FRC_REG4_OFFSET
, 1)) != RT_ERR_OK
)
356 if ((retVal
= rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1
, RTL8367C_SDS_FRC_REG4_FIB100_OFFSET
, 0)) != RT_ERR_OK
)
359 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR
, 0x0044)) != RT_ERR_OK
)
362 if ((retVal
= rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD
, 0x0080)) != RT_ERR_OK
)
365 if ((retVal
= rtl8367c_getAsicReg(RTL8367C_REG_SDS_INDACS_DATA
, ®Data
)) != RT_ERR_OK
)
368 if(regData
& (0x0001 << 8))
371 if(regData
& (0x0001 << 7))
375 if ((retVal
= rtl8367c_getAsicRegBit(RTL8367C_REG_FIBER_CFG_1
, RTL8367C_SDS_FRC_MODE_OFFSET
, &data
)) != RT_ERR_OK
)
380 pAbility
->AutoNegotiation
= 1;
381 pAbility
->Full_1000
= 1;
382 pAbility
->Full_100
= 1;
386 if ((retVal
= rtl8367c_getAsicRegBits(RTL8367C_REG_FIBER_CFG_1
, RTL8367C_SDS_MODE_MASK
, &data
)) != RT_ERR_OK
)
391 pAbility
->Full_1000
= 1;
393 if ((retVal
= rtl8367c_getAsicReg(RTL8367C_REG_FIB0_CFG00
, &data
)) != RT_ERR_OK
)
397 pAbility
->AutoNegotiation
= 1;
399 pAbility
->AutoNegotiation
= 0;
402 pAbility
->Full_100
= 1;
404 return RT_ERR_FAILED
;
411 * rtk_port_phyAutoNegoAbility_set
413 * Set Ethernet PHY auto-negotiation desired ability.
416 * pAbility - Ability structure
421 * RT_ERR_FAILED - Failed
422 * RT_ERR_SMI - SMI access error
423 * RT_ERR_PORT_ID - Invalid port number.
424 * RT_ERR_PHY_REG_ID - Invalid PHY address
425 * RT_ERR_INPUT - Invalid input parameters.
426 * RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
428 * If Full_1000 bit is set to 1, the AutoNegotiation will be automatic set to 1. While both AutoNegotiation and Full_1000 are set to 0, the PHY speed and duplex selection will
429 * be set as following 100F > 100H > 10F > 10H priority sequence.
431 rtk_api_ret_t
rtk_port_phyAutoNegoAbility_set(rtk_port_t port
, rtk_port_phy_ability_t
*pAbility
)
433 rtk_api_ret_t retVal
;
435 rtk_uint32 phyEnMsk0
;
436 rtk_uint32 phyEnMsk4
;
437 rtk_uint32 phyEnMsk9
;
438 rtk_port_media_t media_type
;
440 /* Check initialization state */
441 RTK_CHK_INIT_STATE();
443 /* Check Port Valid */
444 RTK_CHK_PORT_IS_UTP(port
);
447 return RT_ERR_NULL_POINTER
;
449 if (pAbility
->Half_10
>= RTK_ENABLE_END
|| pAbility
->Full_10
>= RTK_ENABLE_END
||
450 pAbility
->Half_100
>= RTK_ENABLE_END
|| pAbility
->Full_100
>= RTK_ENABLE_END
||
451 pAbility
->Full_1000
>= RTK_ENABLE_END
|| pAbility
->AutoNegotiation
>= RTK_ENABLE_END
||
452 pAbility
->AsyFC
>= RTK_ENABLE_END
|| pAbility
->FC
>= RTK_ENABLE_END
)
455 if (rtk_switch_isComboPort(port
) == RT_ERR_OK
)
457 if ((retVal
= rtk_port_phyComboPortMedia_get(port
, &media_type
)) != RT_ERR_OK
)
460 if(media_type
== PORT_MEDIA_FIBER
)
462 return _rtk_port_FiberModeAbility_set(port
, pAbility
);
466 /*for PHY auto mode setup*/
467 pAbility
->AutoNegotiation
= 1;
473 if (1 == pAbility
->Half_10
)
475 /*10BASE-TX half duplex capable in reg 4.5*/
476 phyEnMsk4
= phyEnMsk4
| (1 << 5);
478 /*Speed selection [1:0] */
483 phyEnMsk0
= phyEnMsk0
& (~(1 << 6));
484 phyEnMsk0
= phyEnMsk0
& (~(1 << 13));
487 if (1 == pAbility
->Full_10
)
489 /*10BASE-TX full duplex capable in reg 4.6*/
490 phyEnMsk4
= phyEnMsk4
| (1 << 6);
491 /*Speed selection [1:0] */
496 phyEnMsk0
= phyEnMsk0
& (~(1 << 6));
497 phyEnMsk0
= phyEnMsk0
& (~(1 << 13));
499 /*Full duplex mode in reg 0.8*/
500 phyEnMsk0
= phyEnMsk0
| (1 << 8);
504 if (1 == pAbility
->Half_100
)
506 /*100BASE-TX half duplex capable in reg 4.7*/
507 phyEnMsk4
= phyEnMsk4
| (1 << 7);
508 /*Speed selection [1:0] */
513 phyEnMsk0
= phyEnMsk0
& (~(1 << 6));
514 phyEnMsk0
= phyEnMsk0
| (1 << 13);
518 if (1 == pAbility
->Full_100
)
520 /*100BASE-TX full duplex capable in reg 4.8*/
521 phyEnMsk4
= phyEnMsk4
| (1 << 8);
522 /*Speed selection [1:0] */
527 phyEnMsk0
= phyEnMsk0
& (~(1 << 6));
528 phyEnMsk0
= phyEnMsk0
| (1 << 13);
529 /*Full duplex mode in reg 0.8*/
530 phyEnMsk0
= phyEnMsk0
| (1 << 8);
534 if (1 == pAbility
->Full_1000
)
536 /*1000 BASE-T FULL duplex capable setting in reg 9.9*/
537 phyEnMsk9
= phyEnMsk9
| (1 << 9);
539 /*Speed selection [1:0] */
544 phyEnMsk0
= phyEnMsk0
| (1 << 6);
545 phyEnMsk0
= phyEnMsk0
& (~(1 << 13));
548 /*Auto-Negotiation setting in reg 0.12*/
549 phyEnMsk0
= phyEnMsk0
| (1 << 12);
553 if (1 == pAbility
->AutoNegotiation
)
555 /*Auto-Negotiation setting in reg 0.12*/
556 phyEnMsk0
= phyEnMsk0
| (1 << 12);
559 if (1 == pAbility
->AsyFC
)
561 /*Asymetric flow control in reg 4.11*/
562 phyEnMsk4
= phyEnMsk4
| (1 << 11);
564 if (1 == pAbility
->FC
)
566 /*Flow control in reg 4.10*/
567 phyEnMsk4
= phyEnMsk4
| (1 << 10);
570 /*1000 BASE-T control register setting*/
571 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_1000_BASET_CONTROL_REG
, &phyData
)) != RT_ERR_OK
)
574 phyData
= (phyData
& (~0x0200)) | phyEnMsk9
;
576 if ((retVal
= rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_1000_BASET_CONTROL_REG
, phyData
)) != RT_ERR_OK
)
579 /*Auto-Negotiation control register setting*/
580 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_AN_ADVERTISEMENT_REG
, &phyData
)) != RT_ERR_OK
)
583 phyData
= (phyData
& (~0x0DE0)) | phyEnMsk4
;
584 if ((retVal
= rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_AN_ADVERTISEMENT_REG
, phyData
)) != RT_ERR_OK
)
587 /*Control register setting and restart auto*/
588 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_CONTROL_REG
, &phyData
)) != RT_ERR_OK
)
591 phyData
= (phyData
& (~0x3140)) | phyEnMsk0
;
592 /*If have auto-negotiation capable, then restart auto negotiation*/
593 if (1 == pAbility
->AutoNegotiation
)
595 phyData
= phyData
| (1 << 9);
598 if ((retVal
= rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_CONTROL_REG
, phyData
)) != RT_ERR_OK
)
605 * rtk_port_phyAutoNegoAbility_get
607 * Get PHY ability through PHY registers.
611 * pAbility - Ability structure
614 * RT_ERR_FAILED - Failed
615 * RT_ERR_SMI - SMI access error
616 * RT_ERR_PORT_ID - Invalid port number.
617 * RT_ERR_PHY_REG_ID - Invalid PHY address
618 * RT_ERR_INPUT - Invalid input parameters.
619 * RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
621 * Get the capability of specified PHY.
623 rtk_api_ret_t
rtk_port_phyAutoNegoAbility_get(rtk_port_t port
, rtk_port_phy_ability_t
*pAbility
)
625 rtk_api_ret_t retVal
;
629 rtk_port_media_t media_type
;
631 /* Check initialization state */
632 RTK_CHK_INIT_STATE();
634 /* Check Port Valid */
635 RTK_CHK_PORT_IS_UTP(port
);
638 return RT_ERR_NULL_POINTER
;
640 if (rtk_switch_isComboPort(port
) == RT_ERR_OK
)
642 if ((retVal
= rtk_port_phyComboPortMedia_get(port
, &media_type
)) != RT_ERR_OK
)
645 if(media_type
== PORT_MEDIA_FIBER
)
647 return _rtk_port_FiberModeAbility_get(port
, pAbility
);
651 /*Control register setting and restart auto*/
652 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_CONTROL_REG
, &phyData0
)) != RT_ERR_OK
)
655 /*Auto-Negotiation control register setting*/
656 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_AN_ADVERTISEMENT_REG
, &phyData4
)) != RT_ERR_OK
)
659 /*1000 BASE-T control register setting*/
660 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_1000_BASET_CONTROL_REG
, &phyData9
)) != RT_ERR_OK
)
663 if (phyData9
& (1 << 9))
664 pAbility
->Full_1000
= 1;
666 pAbility
->Full_1000
= 0;
668 if (phyData4
& (1 << 11))
673 if (phyData4
& (1 << 10))
679 if (phyData4
& (1 << 8))
680 pAbility
->Full_100
= 1;
682 pAbility
->Full_100
= 0;
684 if (phyData4
& (1 << 7))
685 pAbility
->Half_100
= 1;
687 pAbility
->Half_100
= 0;
689 if (phyData4
& (1 << 6))
690 pAbility
->Full_10
= 1;
692 pAbility
->Full_10
= 0;
694 if (phyData4
& (1 << 5))
695 pAbility
->Half_10
= 1;
697 pAbility
->Half_10
= 0;
700 if (phyData0
& (1 << 12))
701 pAbility
->AutoNegotiation
= 1;
703 pAbility
->AutoNegotiation
= 0;
709 * rtk_port_phyForceModeAbility_set
711 * Set the port speed/duplex mode/pause/asy_pause in the PHY force mode.
714 * pAbility - Ability structure
719 * RT_ERR_FAILED - Failed
720 * RT_ERR_SMI - SMI access error
721 * RT_ERR_PORT_ID - Invalid port number.
722 * RT_ERR_PHY_REG_ID - Invalid PHY address
723 * RT_ERR_INPUT - Invalid input parameters.
724 * RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
726 * While both AutoNegotiation and Full_1000 are set to 0, the PHY speed and duplex selection will
727 * be set as following 100F > 100H > 10F > 10H priority sequence.
728 * This API can be used to configure combo port in fiber mode.
729 * The possible parameters in fiber mode are Full_1000 and Full 100.
730 * All the other fields in rtk_port_phy_ability_t will be ignored in fiber port.
732 rtk_api_ret_t
rtk_port_phyForceModeAbility_set(rtk_port_t port
, rtk_port_phy_ability_t
*pAbility
)
734 rtk_api_ret_t retVal
;
736 rtk_uint32 phyEnMsk0
;
737 rtk_uint32 phyEnMsk4
;
738 rtk_uint32 phyEnMsk9
;
739 rtk_port_media_t media_type
;
741 /* Check initialization state */
742 RTK_CHK_INIT_STATE();
744 /* Check Port Valid */
745 RTK_CHK_PORT_IS_UTP(port
);
748 return RT_ERR_NULL_POINTER
;
750 if (pAbility
->Half_10
>= RTK_ENABLE_END
|| pAbility
->Full_10
>= RTK_ENABLE_END
||
751 pAbility
->Half_100
>= RTK_ENABLE_END
|| pAbility
->Full_100
>= RTK_ENABLE_END
||
752 pAbility
->Full_1000
>= RTK_ENABLE_END
|| pAbility
->AutoNegotiation
>= RTK_ENABLE_END
||
753 pAbility
->AsyFC
>= RTK_ENABLE_END
|| pAbility
->FC
>= RTK_ENABLE_END
)
756 if (rtk_switch_isComboPort(port
) == RT_ERR_OK
)
758 if ((retVal
= rtk_port_phyComboPortMedia_get(port
, &media_type
)) != RT_ERR_OK
)
761 if(media_type
== PORT_MEDIA_FIBER
)
763 return _rtk_port_FiberModeAbility_set(port
, pAbility
);
767 if (1 == pAbility
->Full_1000
)
770 /*for PHY force mode setup*/
771 pAbility
->AutoNegotiation
= 0;
777 if (1 == pAbility
->Half_10
)
779 /*10BASE-TX half duplex capable in reg 4.5*/
780 phyEnMsk4
= phyEnMsk4
| (1 << 5);
782 /*Speed selection [1:0] */
787 phyEnMsk0
= phyEnMsk0
& (~(1 << 6));
788 phyEnMsk0
= phyEnMsk0
& (~(1 << 13));
791 if (1 == pAbility
->Full_10
)
793 /*10BASE-TX full duplex capable in reg 4.6*/
794 phyEnMsk4
= phyEnMsk4
| (1 << 6);
795 /*Speed selection [1:0] */
800 phyEnMsk0
= phyEnMsk0
& (~(1 << 6));
801 phyEnMsk0
= phyEnMsk0
& (~(1 << 13));
803 /*Full duplex mode in reg 0.8*/
804 phyEnMsk0
= phyEnMsk0
| (1 << 8);
808 if (1 == pAbility
->Half_100
)
810 /*100BASE-TX half duplex capable in reg 4.7*/
811 phyEnMsk4
= phyEnMsk4
| (1 << 7);
812 /*Speed selection [1:0] */
817 phyEnMsk0
= phyEnMsk0
& (~(1 << 6));
818 phyEnMsk0
= phyEnMsk0
| (1 << 13);
822 if (1 == pAbility
->Full_100
)
824 /*100BASE-TX full duplex capable in reg 4.8*/
825 phyEnMsk4
= phyEnMsk4
| (1 << 8);
826 /*Speed selection [1:0] */
831 phyEnMsk0
= phyEnMsk0
& (~(1 << 6));
832 phyEnMsk0
= phyEnMsk0
| (1 << 13);
833 /*Full duplex mode in reg 0.8*/
834 phyEnMsk0
= phyEnMsk0
| (1 << 8);
837 if (1 == pAbility
->AsyFC
)
839 /*Asymmetric flow control in reg 4.11*/
840 phyEnMsk4
= phyEnMsk4
| (1 << 11);
842 if (1 == pAbility
->FC
)
844 /*Flow control in reg 4.10*/
845 phyEnMsk4
= phyEnMsk4
| ((1 << 10));
848 /*1000 BASE-T control register setting*/
849 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_1000_BASET_CONTROL_REG
, &phyData
)) != RT_ERR_OK
)
852 phyData
= (phyData
& (~0x0200)) | phyEnMsk9
;
854 if ((retVal
= rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_1000_BASET_CONTROL_REG
, phyData
)) != RT_ERR_OK
)
857 /*Auto-Negotiation control register setting*/
858 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_AN_ADVERTISEMENT_REG
, &phyData
)) != RT_ERR_OK
)
861 phyData
= (phyData
& (~0x0DE0)) | phyEnMsk4
;
862 if ((retVal
= rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_AN_ADVERTISEMENT_REG
, phyData
)) != RT_ERR_OK
)
865 /*Control register setting and power off/on*/
866 phyData
= phyEnMsk0
& (~(1 << 12));
867 phyData
|= (1 << 11); /* power down PHY, bit 11 should be set to 1 */
868 if ((retVal
= rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_CONTROL_REG
, phyData
)) != RT_ERR_OK
)
871 phyData
= phyData
& (~(1 << 11)); /* power on PHY, bit 11 should be set to 0*/
872 if ((retVal
= rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_CONTROL_REG
, phyData
)) != RT_ERR_OK
)
879 * rtk_port_phyForceModeAbility_get
881 * Get PHY ability through PHY registers.
885 * pAbility - Ability structure
888 * RT_ERR_FAILED - Failed
889 * RT_ERR_SMI - SMI access error
890 * RT_ERR_PORT_ID - Invalid port number.
891 * RT_ERR_PHY_REG_ID - Invalid PHY address
892 * RT_ERR_INPUT - Invalid input parameters.
893 * RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
895 * Get the capability of specified PHY.
897 rtk_api_ret_t
rtk_port_phyForceModeAbility_get(rtk_port_t port
, rtk_port_phy_ability_t
*pAbility
)
899 rtk_api_ret_t retVal
;
903 rtk_port_media_t media_type
;
905 /* Check initialization state */
906 RTK_CHK_INIT_STATE();
908 /* Check Port Valid */
909 RTK_CHK_PORT_IS_UTP(port
);
912 return RT_ERR_NULL_POINTER
;
914 if (rtk_switch_isComboPort(port
) == RT_ERR_OK
)
916 if ((retVal
= rtk_port_phyComboPortMedia_get(port
, &media_type
)) != RT_ERR_OK
)
919 if(media_type
== PORT_MEDIA_FIBER
)
921 return _rtk_port_FiberModeAbility_get(port
, pAbility
);
925 /*Control register setting and restart auto*/
926 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_CONTROL_REG
, &phyData0
)) != RT_ERR_OK
)
929 /*Auto-Negotiation control register setting*/
930 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_AN_ADVERTISEMENT_REG
, &phyData4
)) != RT_ERR_OK
)
933 /*1000 BASE-T control register setting*/
934 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_1000_BASET_CONTROL_REG
, &phyData9
)) != RT_ERR_OK
)
937 if (phyData9
& (1 << 9))
938 pAbility
->Full_1000
= 1;
940 pAbility
->Full_1000
= 0;
942 if (phyData4
& (1 << 11))
947 if (phyData4
& ((1 << 10)))
953 if (phyData4
& (1 << 8))
954 pAbility
->Full_100
= 1;
956 pAbility
->Full_100
= 0;
958 if (phyData4
& (1 << 7))
959 pAbility
->Half_100
= 1;
961 pAbility
->Half_100
= 0;
963 if (phyData4
& (1 << 6))
964 pAbility
->Full_10
= 1;
966 pAbility
->Full_10
= 0;
968 if (phyData4
& (1 << 5))
969 pAbility
->Half_10
= 1;
971 pAbility
->Half_10
= 0;
974 if (phyData0
& (1 << 12))
975 pAbility
->AutoNegotiation
= 1;
977 pAbility
->AutoNegotiation
= 0;
983 * rtk_port_phyStatus_get
985 * Get Ethernet PHY linking status
989 * linkStatus - PHY link status
990 * speed - PHY link speed
991 * duplex - PHY duplex mode
994 * RT_ERR_FAILED - Failed
995 * RT_ERR_SMI - SMI access error
996 * RT_ERR_PORT_ID - Invalid port number.
997 * RT_ERR_PHY_REG_ID - Invalid PHY address
998 * RT_ERR_INPUT - Invalid input parameters.
999 * RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
1001 * API will return auto negotiation status of phy.
1003 rtk_api_ret_t
rtk_port_phyStatus_get(rtk_port_t port
, rtk_port_linkStatus_t
*pLinkStatus
, rtk_port_speed_t
*pSpeed
, rtk_port_duplex_t
*pDuplex
)
1005 rtk_api_ret_t retVal
;
1008 /* Check initialization state */
1009 RTK_CHK_INIT_STATE();
1011 /* Check Port Valid */
1012 RTK_CHK_PORT_IS_UTP(port
);
1014 if( (NULL
== pLinkStatus
) || (NULL
== pSpeed
) || (NULL
== pDuplex
) )
1015 return RT_ERR_NULL_POINTER
;
1017 /*Get PHY resolved register*/
1018 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_RESOLVED_REG
, &phyData
)) != RT_ERR_OK
)
1021 /*check link status*/
1022 if (phyData
& (1<<2))
1026 /*check link speed*/
1027 *pSpeed
= (phyData
&0x0030) >> 4;
1029 /*check link duplex*/
1030 *pDuplex
= (phyData
&0x0008) >> 3;
1043 * rtk_port_macForceLink_set
1045 * Set port force linking configuration.
1048 * pPortability - port ability configuration
1053 * RT_ERR_FAILED - Failed
1054 * RT_ERR_SMI - SMI access error
1055 * RT_ERR_PORT_ID - Invalid port number.
1057 * This API can set Port/MAC force mode properties.
1059 rtk_api_ret_t
rtk_port_macForceLink_set(rtk_port_t port
, rtk_port_mac_ability_t
*pPortability
)
1061 rtk_api_ret_t retVal
;
1062 rtl8367c_port_ability_t ability
;
1064 /* Check initialization state */
1065 RTK_CHK_INIT_STATE();
1067 /* Check Port Valid */
1068 RTK_CHK_PORT_IS_UTP(port
);
1070 if(NULL
== pPortability
)
1071 return RT_ERR_NULL_POINTER
;
1073 if (pPortability
->forcemode
>1|| pPortability
->speed
> 2 || pPortability
->duplex
> 1 ||
1074 pPortability
->link
> 1 || pPortability
->nway
> 1 || pPortability
->txpause
> 1 || pPortability
->rxpause
> 1)
1075 return RT_ERR_INPUT
;
1077 if ((retVal
= rtl8367c_getAsicPortForceLink(rtk_switch_port_L2P_get(port
), &ability
)) != RT_ERR_OK
)
1080 ability
.forcemode
= pPortability
->forcemode
;
1081 ability
.speed
= pPortability
->speed
;
1082 ability
.duplex
= pPortability
->duplex
;
1083 ability
.link
= pPortability
->link
;
1084 ability
.nway
= pPortability
->nway
;
1085 ability
.txpause
= pPortability
->txpause
;
1086 ability
.rxpause
= pPortability
->rxpause
;
1088 if ((retVal
= rtl8367c_setAsicPortForceLink(rtk_switch_port_L2P_get(port
), &ability
)) != RT_ERR_OK
)
1095 * rtk_port_macForceLink_get
1097 * Get port force linking configuration.
1101 * pPortability - port ability configuration
1104 * RT_ERR_FAILED - Failed
1105 * RT_ERR_SMI - SMI access error
1106 * RT_ERR_PORT_ID - Invalid port number.
1107 * RT_ERR_INPUT - Invalid input parameters.
1109 * This API can get Port/MAC force mode properties.
1111 rtk_api_ret_t
rtk_port_macForceLink_get(rtk_port_t port
, rtk_port_mac_ability_t
*pPortability
)
1113 rtk_api_ret_t retVal
;
1114 rtl8367c_port_ability_t ability
;
1116 /* Check initialization state */
1117 RTK_CHK_INIT_STATE();
1119 /* Check Port Valid */
1120 RTK_CHK_PORT_IS_UTP(port
);
1122 if(NULL
== pPortability
)
1123 return RT_ERR_NULL_POINTER
;
1125 if ((retVal
= rtl8367c_getAsicPortForceLink(rtk_switch_port_L2P_get(port
), &ability
)) != RT_ERR_OK
)
1128 pPortability
->forcemode
= ability
.forcemode
;
1129 pPortability
->speed
= ability
.speed
;
1130 pPortability
->duplex
= ability
.duplex
;
1131 pPortability
->link
= ability
.link
;
1132 pPortability
->nway
= ability
.nway
;
1133 pPortability
->txpause
= ability
.txpause
;
1134 pPortability
->rxpause
= ability
.rxpause
;
1140 * rtk_port_macForceLinkExt_set
1142 * Set external interface force linking configuration.
1144 * port - external port ID
1145 * mode - external interface mode
1146 * pPortability - port ability configuration
1151 * RT_ERR_FAILED - Failed
1152 * RT_ERR_SMI - SMI access error
1153 * RT_ERR_INPUT - Invalid input parameters.
1155 * This API can set external interface force mode properties.
1156 * The external interface can be set to:
1157 * - MODE_EXT_DISABLE,
1159 * - MODE_EXT_MII_MAC,
1160 * - MODE_EXT_MII_PHY,
1161 * - MODE_EXT_TMII_MAC,
1162 * - MODE_EXT_TMII_PHY,
1164 * - MODE_EXT_RMII_MAC,
1165 * - MODE_EXT_RMII_PHY,
1167 * - MODE_EXT_HSGMII,
1168 * - MODE_EXT_1000X_100FX,
1172 rtk_api_ret_t
rtk_port_macForceLinkExt_set(rtk_port_t port
, rtk_mode_ext_t mode
, rtk_port_mac_ability_t
*pPortability
)
1174 rtk_api_ret_t retVal
;
1175 rtl8367c_port_ability_t ability
;
1178 /* Check initialization state */
1179 RTK_CHK_INIT_STATE();
1181 /* Check Port Valid */
1182 RTK_CHK_PORT_IS_EXT(port
);
1184 if(NULL
== pPortability
)
1185 return RT_ERR_NULL_POINTER
;
1187 if (mode
>=MODE_EXT_END
)
1188 return RT_ERR_INPUT
;
1190 if(mode
== MODE_EXT_HSGMII
)
1192 if (pPortability
->forcemode
> 1 || pPortability
->speed
!= PORT_SPEED_2500M
|| pPortability
->duplex
!= PORT_FULL_DUPLEX
||
1193 pPortability
->link
>= PORT_LINKSTATUS_END
|| pPortability
->nway
> 1 || pPortability
->txpause
> 1 || pPortability
->rxpause
> 1)
1194 return RT_ERR_INPUT
;
1196 if(rtk_switch_isHsgPort(port
) != RT_ERR_OK
)
1197 return RT_ERR_PORT_ID
;
1201 if (pPortability
->forcemode
> 1 || pPortability
->speed
> PORT_SPEED_1000M
|| pPortability
->duplex
>= PORT_DUPLEX_END
||
1202 pPortability
->link
>= PORT_LINKSTATUS_END
|| pPortability
->nway
> 1 || pPortability
->txpause
> 1 || pPortability
->rxpause
> 1)
1203 return RT_ERR_INPUT
;
1208 if(mode
== MODE_EXT_DISABLE
)
1210 memset(&ability
, 0x00, sizeof(rtl8367c_port_ability_t
));
1211 if ((retVal
= rtl8367c_setAsicPortForceLinkExt(ext_id
, &ability
)) != RT_ERR_OK
)
1214 if ((retVal
= rtl8367c_setAsicPortExtMode(ext_id
, mode
)) != RT_ERR_OK
)
1219 if ((retVal
= rtl8367c_setAsicPortExtMode(ext_id
, mode
)) != RT_ERR_OK
)
1222 if ((retVal
= rtl8367c_getAsicPortForceLinkExt(ext_id
, &ability
)) != RT_ERR_OK
)
1225 ability
.forcemode
= pPortability
->forcemode
;
1226 ability
.speed
= (mode
== MODE_EXT_HSGMII
) ? PORT_SPEED_1000M
: pPortability
->speed
;
1227 ability
.duplex
= pPortability
->duplex
;
1228 ability
.link
= pPortability
->link
;
1229 ability
.nway
= pPortability
->nway
;
1230 ability
.txpause
= pPortability
->txpause
;
1231 ability
.rxpause
= pPortability
->rxpause
;
1233 if ((retVal
= rtl8367c_setAsicPortForceLinkExt(ext_id
, &ability
)) != RT_ERR_OK
)
1241 * rtk_port_macForceLinkExt_get
1243 * Set external interface force linking configuration.
1245 * port - external port ID
1247 * pMode - external interface mode
1248 * pPortability - port ability configuration
1251 * RT_ERR_FAILED - Failed
1252 * RT_ERR_SMI - SMI access error
1253 * RT_ERR_INPUT - Invalid input parameters.
1255 * This API can get external interface force mode properties.
1257 rtk_api_ret_t
rtk_port_macForceLinkExt_get(rtk_port_t port
, rtk_mode_ext_t
*pMode
, rtk_port_mac_ability_t
*pPortability
)
1259 rtk_api_ret_t retVal
;
1260 rtl8367c_port_ability_t ability
;
1263 /* Check initialization state */
1264 RTK_CHK_INIT_STATE();
1266 /* Check Port Valid */
1267 RTK_CHK_PORT_IS_EXT(port
);
1270 return RT_ERR_NULL_POINTER
;
1272 if(NULL
== pPortability
)
1273 return RT_ERR_NULL_POINTER
;
1277 if ((retVal
= rtl8367c_getAsicPortExtMode(ext_id
, (rtk_uint32
*)pMode
)) != RT_ERR_OK
)
1280 if ((retVal
= rtl8367c_getAsicPortForceLinkExt(ext_id
, &ability
)) != RT_ERR_OK
)
1283 pPortability
->forcemode
= ability
.forcemode
;
1284 pPortability
->speed
= (*pMode
== MODE_EXT_HSGMII
) ? PORT_SPEED_2500M
: ability
.speed
;
1285 pPortability
->duplex
= ability
.duplex
;
1286 pPortability
->link
= ability
.link
;
1287 pPortability
->nway
= ability
.nway
;
1288 pPortability
->txpause
= ability
.txpause
;
1289 pPortability
->rxpause
= ability
.rxpause
;
1296 * rtk_port_macStatus_get
1298 * Get port link status.
1302 * pPortstatus - port ability configuration
1305 * RT_ERR_FAILED - Failed
1306 * RT_ERR_SMI - SMI access error
1307 * RT_ERR_PORT_ID - Invalid port number.
1309 * This API can get Port/PHY properties.
1311 rtk_api_ret_t
rtk_port_macStatus_get(rtk_port_t port
, rtk_port_mac_ability_t
*pPortstatus
)
1313 rtk_api_ret_t retVal
;
1314 rtl8367c_port_status_t status
;
1317 /* Check initialization state */
1318 RTK_CHK_INIT_STATE();
1320 /* Check Port Valid */
1321 RTK_CHK_PORT_VALID(port
);
1323 if(NULL
== pPortstatus
)
1324 return RT_ERR_NULL_POINTER
;
1326 if ((retVal
= rtl8367c_getAsicPortStatus(rtk_switch_port_L2P_get(port
), &status
)) != RT_ERR_OK
)
1330 pPortstatus
->duplex
= status
.duplex
;
1331 pPortstatus
->link
= status
.link
;
1332 pPortstatus
->nway
= status
.nway
;
1333 pPortstatus
->txpause
= status
.txpause
;
1334 pPortstatus
->rxpause
= status
.rxpause
;
1336 if( (retVal
= rtl8367c_getAsicRegBit(RTL8367C_REG_SDS_MISC
, RTL8367C_CFG_MAC8_SEL_HSGMII_OFFSET
, &hsgsel
)) != RT_ERR_OK
)
1339 if( (rtk_switch_isHsgPort(port
) == RT_ERR_OK
) && (hsgsel
== 1) )
1340 pPortstatus
->speed
= PORT_SPEED_2500M
;
1342 pPortstatus
->speed
= status
.speed
;
1348 * rtk_port_macLocalLoopbackEnable_set
1350 * Set Port Local Loopback. (Redirect TX to RX.)
1353 * enable - Loopback state, 0:disable, 1:enable
1358 * RT_ERR_FAILED - Failed
1359 * RT_ERR_SMI - SMI access error
1360 * RT_ERR_PORT_ID - Invalid port number.
1362 * This API can enable/disable Local loopback in MAC.
1363 * For UTP port, This API will also enable the digital
1364 * loopback bit in PHY register for sync of speed between
1365 * PHY and MAC. For EXT port, users need to force the
1366 * link state by themselves.
1368 rtk_api_ret_t
rtk_port_macLocalLoopbackEnable_set(rtk_port_t port
, rtk_enable_t enable
)
1370 rtk_api_ret_t retVal
;
1373 /* Check initialization state */
1374 RTK_CHK_INIT_STATE();
1376 /* Check Port Valid */
1377 RTK_CHK_PORT_VALID(port
);
1379 if(enable
>= RTK_ENABLE_END
)
1380 return RT_ERR_INPUT
;
1382 if ((retVal
= rtl8367c_setAsicPortLoopback(rtk_switch_port_L2P_get(port
), enable
)) != RT_ERR_OK
)
1385 if(rtk_switch_isUtpPort(port
) == RT_ERR_OK
)
1387 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_CONTROL_REG
, &data
)) != RT_ERR_OK
)
1390 if(enable
== ENABLED
)
1391 data
|= (0x0001 << 14);
1393 data
&= ~(0x0001 << 14);
1395 if ((retVal
= rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port
), PHY_CONTROL_REG
, data
)) != RT_ERR_OK
)
1403 * rtk_port_macLocalLoopbackEnable_get
1405 * Get Port Local Loopback. (Redirect TX to RX.)
1409 * pEnable - Loopback state, 0:disable, 1:enable
1412 * RT_ERR_FAILED - Failed
1413 * RT_ERR_SMI - SMI access error
1414 * RT_ERR_PORT_ID - Invalid port number.
1418 rtk_api_ret_t
rtk_port_macLocalLoopbackEnable_get(rtk_port_t port
, rtk_enable_t
*pEnable
)
1420 rtk_api_ret_t retVal
;
1422 /* Check initialization state */
1423 RTK_CHK_INIT_STATE();
1425 /* Check Port Valid */
1426 RTK_CHK_PORT_VALID(port
);
1429 return RT_ERR_NULL_POINTER
;
1431 if ((retVal
= rtl8367c_getAsicPortLoopback(rtk_switch_port_L2P_get(port
), pEnable
)) != RT_ERR_OK
)
1438 * rtk_port_phyReg_set
1440 * Set PHY register data of the specific port.
1444 * regData - Register data
1449 * RT_ERR_FAILED - Failed
1450 * RT_ERR_SMI - SMI access error
1451 * RT_ERR_PORT_ID - Invalid port number.
1452 * RT_ERR_PHY_REG_ID - Invalid PHY address
1453 * RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
1455 * This API can set PHY register data of the specific port.
1457 rtk_api_ret_t
rtk_port_phyReg_set(rtk_port_t port
, rtk_port_phy_reg_t reg
, rtk_port_phy_data_t regData
)
1459 rtk_api_ret_t retVal
;
1461 /* Check initialization state */
1462 RTK_CHK_INIT_STATE();
1464 /* Check Port Valid */
1465 RTK_CHK_PORT_IS_UTP(port
);
1467 if ((retVal
= rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port
), reg
, regData
)) != RT_ERR_OK
)
1474 * rtk_port_phyReg_get
1476 * Get PHY register data of the specific port.
1481 * pData - Register data
1484 * RT_ERR_FAILED - Failed
1485 * RT_ERR_SMI - SMI access error
1486 * RT_ERR_PORT_ID - Invalid port number.
1487 * RT_ERR_PHY_REG_ID - Invalid PHY address
1488 * RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
1490 * This API can get PHY register data of the specific port.
1492 rtk_api_ret_t
rtk_port_phyReg_get(rtk_port_t port
, rtk_port_phy_reg_t reg
, rtk_port_phy_data_t
*pData
)
1494 rtk_api_ret_t retVal
;
1496 /* Check initialization state */
1497 RTK_CHK_INIT_STATE();
1499 /* Check Port Valid */
1500 RTK_CHK_PORT_IS_UTP(port
);
1502 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), reg
, pData
)) != RT_ERR_OK
)
1509 * rtk_port_backpressureEnable_set
1511 * Set the half duplex back-pressure enable status of the specific port.
1514 * enable - Back pressure status.
1519 * RT_ERR_FAILED - Failed
1520 * RT_ERR_SMI - SMI access error
1521 * RT_ERR_PORT_ID - Invalid port number.
1522 * RT_ERR_ENABLE - Invalid enable input.
1524 * This API can set the half duplex back-pressure enable status of the specific port.
1525 * The half duplex back-pressure enable status of the port is as following:
1527 * - ENABLE (Back-pressure)
1529 rtk_api_ret_t
rtk_port_backpressureEnable_set(rtk_port_t port
, rtk_enable_t enable
)
1531 rtk_api_ret_t retVal
;
1533 /* Check initialization state */
1534 RTK_CHK_INIT_STATE();
1536 if (port
!= RTK_WHOLE_SYSTEM
)
1537 return RT_ERR_PORT_ID
;
1539 if (enable
>= RTK_ENABLE_END
)
1540 return RT_ERR_INPUT
;
1542 if ((retVal
= rtl8367c_setAsicPortJamMode(!enable
)) != RT_ERR_OK
)
1549 * rtk_port_backpressureEnable_get
1551 * Get the half duplex back-pressure enable status of the specific port.
1555 * pEnable - Back pressure status.
1558 * RT_ERR_FAILED - Failed
1559 * RT_ERR_SMI - SMI access error
1560 * RT_ERR_PORT_ID - Invalid port number.
1562 * This API can get the half duplex back-pressure enable status of the specific port.
1563 * The half duplex back-pressure enable status of the port is as following:
1565 * - ENABLE (Back-pressure)
1567 rtk_api_ret_t
rtk_port_backpressureEnable_get(rtk_port_t port
, rtk_enable_t
*pEnable
)
1569 rtk_api_ret_t retVal
;
1572 /* Check initialization state */
1573 RTK_CHK_INIT_STATE();
1575 if (port
!= RTK_WHOLE_SYSTEM
)
1576 return RT_ERR_PORT_ID
;
1579 return RT_ERR_NULL_POINTER
;
1581 if ((retVal
= rtl8367c_getAsicPortJamMode(®Data
)) != RT_ERR_OK
)
1584 *pEnable
= !regData
;
1590 * rtk_port_adminEnable_set
1592 * Set port admin configuration of the specific port.
1595 * enable - Back pressure status.
1600 * RT_ERR_FAILED - Failed
1601 * RT_ERR_SMI - SMI access error
1602 * RT_ERR_PORT_ID - Invalid port number.
1603 * RT_ERR_ENABLE - Invalid enable input.
1605 * This API can set port admin configuration of the specific port.
1606 * The port admin configuration of the port is as following:
1610 rtk_api_ret_t
rtk_port_adminEnable_set(rtk_port_t port
, rtk_enable_t enable
)
1612 rtk_api_ret_t retVal
;
1615 /* Check initialization state */
1616 RTK_CHK_INIT_STATE();
1618 /* Check Port Valid */
1619 RTK_CHK_PORT_IS_UTP(port
);
1621 if (enable
>= RTK_ENABLE_END
)
1622 return RT_ERR_INPUT
;
1624 if ((retVal
= rtk_port_phyReg_get(port
, PHY_CONTROL_REG
, &data
)) != RT_ERR_OK
)
1627 if (ENABLED
== enable
)
1632 else if (DISABLED
== enable
)
1637 if ((retVal
= rtk_port_phyReg_set(port
, PHY_CONTROL_REG
, data
)) != RT_ERR_OK
)
1644 * rtk_port_adminEnable_get
1646 * Get port admin configuration of the specific port.
1650 * pEnable - Back pressure status.
1653 * RT_ERR_FAILED - Failed
1654 * RT_ERR_SMI - SMI access error
1655 * RT_ERR_PORT_ID - Invalid port number.
1657 * This API can get port admin configuration of the specific port.
1658 * The port admin configuration of the port is as following:
1662 rtk_api_ret_t
rtk_port_adminEnable_get(rtk_port_t port
, rtk_enable_t
*pEnable
)
1664 rtk_api_ret_t retVal
;
1667 /* Check initialization state */
1668 RTK_CHK_INIT_STATE();
1670 /* Check Port Valid */
1671 RTK_CHK_PORT_IS_UTP(port
);
1674 return RT_ERR_NULL_POINTER
;
1676 if ((retVal
= rtk_port_phyReg_get(port
, PHY_CONTROL_REG
, &data
)) != RT_ERR_OK
)
1679 if ( (data
& 0x0800) == 0x0800)
1681 *pEnable
= DISABLED
;
1692 * rtk_port_isolation_set
1694 * Set permitted port isolation portmask
1697 * pPortmask - Permit port mask
1702 * RT_ERR_FAILED - Failed
1703 * RT_ERR_SMI - SMI access error
1704 * RT_ERR_PORT_ID - Invalid port number.
1705 * RT_ERR_PORT_MASK - Invalid portmask.
1707 * This API set the port mask that a port can transmit packet to of each port
1708 * A port can only transmit packet to ports included in permitted portmask
1710 rtk_api_ret_t
rtk_port_isolation_set(rtk_port_t port
, rtk_portmask_t
*pPortmask
)
1712 rtk_api_ret_t retVal
;
1715 /* Check initialization state */
1716 RTK_CHK_INIT_STATE();
1718 /* Check Port Valid */
1719 RTK_CHK_PORT_VALID(port
);
1721 if(NULL
== pPortmask
)
1722 return RT_ERR_NULL_POINTER
;
1724 /* check port mask */
1725 RTK_CHK_PORTMASK_VALID(pPortmask
);
1727 if ((retVal
= rtk_switch_portmask_L2P_get(pPortmask
, &pmask
)) != RT_ERR_OK
)
1730 if ((retVal
= rtl8367c_setAsicPortIsolationPermittedPortmask(rtk_switch_port_L2P_get(port
), pmask
)) != RT_ERR_OK
)
1737 * rtk_port_isolation_get
1739 * Get permitted port isolation portmask
1743 * pPortmask - Permit port mask
1746 * RT_ERR_FAILED - Failed
1747 * RT_ERR_SMI - SMI access error
1748 * RT_ERR_PORT_ID - Invalid port number.
1750 * This API get the port mask that a port can transmit packet to of each port
1751 * A port can only transmit packet to ports included in permitted portmask
1753 rtk_api_ret_t
rtk_port_isolation_get(rtk_port_t port
, rtk_portmask_t
*pPortmask
)
1755 rtk_api_ret_t retVal
;
1758 /* Check initialization state */
1759 RTK_CHK_INIT_STATE();
1761 /* Check Port Valid */
1762 RTK_CHK_PORT_VALID(port
);
1764 if(NULL
== pPortmask
)
1765 return RT_ERR_NULL_POINTER
;
1767 if ((retVal
= rtl8367c_getAsicPortIsolationPermittedPortmask(rtk_switch_port_L2P_get(port
), &pmask
)) != RT_ERR_OK
)
1770 if ((retVal
= rtk_switch_portmask_P2L_get(pmask
, pPortmask
)) != RT_ERR_OK
)
1777 * rtk_port_rgmiiDelayExt_set
1779 * Set RGMII interface delay value for TX and RX.
1781 * txDelay - TX delay value, 1 for delay 2ns and 0 for no-delay
1782 * rxDelay - RX delay value, 0~7 for delay setup.
1787 * RT_ERR_FAILED - Failed
1788 * RT_ERR_SMI - SMI access error
1789 * RT_ERR_INPUT - Invalid input parameters.
1791 * This API can set external interface 2 RGMII delay.
1792 * In TX delay, there are 2 selection: no-delay and 2ns delay.
1793 * In RX delay, there are 8 steps for delay tuning. 0 for no-delay, and 7 for maximum delay.
1795 rtk_api_ret_t
rtk_port_rgmiiDelayExt_set(rtk_port_t port
, rtk_data_t txDelay
, rtk_data_t rxDelay
)
1797 rtk_api_ret_t retVal
;
1798 rtk_uint32 regAddr
, regData
;
1800 /* Check initialization state */
1801 RTK_CHK_INIT_STATE();
1803 /* Check Port Valid */
1804 RTK_CHK_PORT_IS_EXT(port
);
1806 if ((txDelay
> 1) || (rxDelay
> 7))
1807 return RT_ERR_INPUT
;
1809 if(port
== EXT_PORT0
)
1810 regAddr
= RTL8367C_REG_EXT1_RGMXF
;
1811 else if(port
== EXT_PORT1
)
1812 regAddr
= RTL8367C_REG_EXT2_RGMXF
;
1814 return RT_ERR_INPUT
;
1816 if ((retVal
= rtl8367c_getAsicReg(regAddr
, ®Data
)) != RT_ERR_OK
)
1819 regData
= (regData
& 0xFFF0) | ((txDelay
<< 3) & 0x0008) | (rxDelay
& 0x0007);
1821 if ((retVal
= rtl8367c_setAsicReg(regAddr
, regData
)) != RT_ERR_OK
)
1828 * rtk_port_rgmiiDelayExt_get
1830 * Get RGMII interface delay value for TX and RX.
1834 * pTxDelay - TX delay value
1835 * pRxDelay - RX delay value
1838 * RT_ERR_FAILED - Failed
1839 * RT_ERR_SMI - SMI access error
1840 * RT_ERR_INPUT - Invalid input parameters.
1842 * This API can set external interface 2 RGMII delay.
1843 * In TX delay, there are 2 selection: no-delay and 2ns delay.
1844 * In RX delay, there are 8 steps for delay tuning. 0 for n0-delay, and 7 for maximum delay.
1846 rtk_api_ret_t
rtk_port_rgmiiDelayExt_get(rtk_port_t port
, rtk_data_t
*pTxDelay
, rtk_data_t
*pRxDelay
)
1848 rtk_api_ret_t retVal
;
1849 rtk_uint32 regAddr
, regData
;
1851 /* Check initialization state */
1852 RTK_CHK_INIT_STATE();
1854 /* Check Port Valid */
1855 RTK_CHK_PORT_IS_EXT(port
);
1857 if( (NULL
== pTxDelay
) || (NULL
== pRxDelay
) )
1858 return RT_ERR_NULL_POINTER
;
1860 if(port
== EXT_PORT0
)
1861 regAddr
= RTL8367C_REG_EXT1_RGMXF
;
1862 else if(port
== EXT_PORT1
)
1863 regAddr
= RTL8367C_REG_EXT2_RGMXF
;
1865 return RT_ERR_INPUT
;
1867 if ((retVal
= rtl8367c_getAsicReg(regAddr
, ®Data
)) != RT_ERR_OK
)
1870 *pTxDelay
= (regData
& 0x0008) >> 3;
1871 *pRxDelay
= regData
& 0x0007;
1877 * rtk_port_phyEnableAll_set
1879 * Set all PHY enable status.
1881 * enable - PHY Enable State.
1886 * RT_ERR_FAILED - Failed
1887 * RT_ERR_SMI - SMI access error
1888 * RT_ERR_ENABLE - Invalid enable input.
1890 * This API can set all PHY status.
1891 * The configuration of all PHY is as following:
1895 rtk_api_ret_t
rtk_port_phyEnableAll_set(rtk_enable_t enable
)
1897 rtk_api_ret_t retVal
;
1901 /* Check initialization state */
1902 RTK_CHK_INIT_STATE();
1904 if (enable
>= RTK_ENABLE_END
)
1905 return RT_ERR_ENABLE
;
1907 if ((retVal
= rtl8367c_setAsicPortEnableAll(enable
)) != RT_ERR_OK
)
1910 RTK_SCAN_ALL_LOG_PORT(port
)
1912 if(rtk_switch_isUtpPort(port
) == RT_ERR_OK
)
1914 if ((retVal
= rtk_port_phyReg_get(port
, PHY_CONTROL_REG
, &data
)) != RT_ERR_OK
)
1917 if (ENABLED
== enable
)
1927 if ((retVal
= rtk_port_phyReg_set(port
, PHY_CONTROL_REG
, data
)) != RT_ERR_OK
)
1937 * rtk_port_phyEnableAll_get
1939 * Get all PHY enable status.
1943 * pEnable - PHY Enable State.
1946 * RT_ERR_FAILED - Failed
1947 * RT_ERR_SMI - SMI access error
1949 * This API can set all PHY status.
1950 * The configuration of all PHY is as following:
1954 rtk_api_ret_t
rtk_port_phyEnableAll_get(rtk_enable_t
*pEnable
)
1956 rtk_api_ret_t retVal
;
1958 /* Check initialization state */
1959 RTK_CHK_INIT_STATE();
1962 return RT_ERR_NULL_POINTER
;
1964 if ((retVal
= rtl8367c_getAsicPortEnableAll(pEnable
)) != RT_ERR_OK
)
1973 * Set port-based enhanced filtering database
1976 * efid - Specified enhanced filtering database.
1981 * RT_ERR_FAILED - Failed
1982 * RT_ERR_SMI - SMI access error
1983 * RT_ERR_L2_FID - Invalid fid.
1984 * RT_ERR_INPUT - Invalid input parameter.
1985 * RT_ERR_PORT_ID - Invalid port ID.
1987 * The API can set port-based enhanced filtering database.
1989 rtk_api_ret_t
rtk_port_efid_set(rtk_port_t port
, rtk_data_t efid
)
1991 rtk_api_ret_t retVal
;
1993 /* Check initialization state */
1994 RTK_CHK_INIT_STATE();
1996 /* Check Port Valid */
1997 RTK_CHK_PORT_VALID(port
);
1999 /* efid must be 0~7 */
2000 if (efid
> RTK_EFID_MAX
)
2001 return RT_ERR_INPUT
;
2003 if ((retVal
= rtl8367c_setAsicPortIsolationEfid(rtk_switch_port_L2P_get(port
), efid
))!=RT_ERR_OK
)
2012 * Get port-based enhanced filtering database
2016 * pEfid - Specified enhanced filtering database.
2019 * RT_ERR_FAILED - Failed
2020 * RT_ERR_SMI - SMI access error
2021 * RT_ERR_INPUT - Invalid input parameters.
2022 * RT_ERR_PORT_ID - Invalid port ID.
2024 * The API can get port-based enhanced filtering database status.
2026 rtk_api_ret_t
rtk_port_efid_get(rtk_port_t port
, rtk_data_t
*pEfid
)
2028 rtk_api_ret_t retVal
;
2030 /* Check initialization state */
2031 RTK_CHK_INIT_STATE();
2033 /* Check Port Valid */
2034 RTK_CHK_PORT_VALID(port
);
2037 return RT_ERR_NULL_POINTER
;
2039 if ((retVal
= rtl8367c_getAsicPortIsolationEfid(rtk_switch_port_L2P_get(port
), pEfid
))!=RT_ERR_OK
)
2046 * rtk_port_phyComboPortMedia_set
2048 * Set Combo port media type
2051 * media - Media (COPPER or FIBER)
2056 * RT_ERR_FAILED - Failed
2057 * RT_ERR_SMI - SMI access error
2058 * RT_ERR_INPUT - Invalid input parameters.
2059 * RT_ERR_PORT_ID - Invalid port ID.
2061 * The API can Set Combo port media type.
2063 rtk_api_ret_t
rtk_port_phyComboPortMedia_set(rtk_port_t port
, rtk_port_media_t media
)
2065 rtk_api_ret_t retVal
;
2069 /* Check initialization state */
2070 RTK_CHK_INIT_STATE();
2072 /* Check Port Valid */
2073 RTK_CHK_PORT_IS_UTP(port
);
2075 /* Check Combo Port ID */
2076 RTK_CHK_PORT_IS_COMBO(port
);
2078 if (media
>= PORT_MEDIA_END
)
2079 return RT_ERR_INPUT
;
2081 if((retVal
= rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK
)
2084 if((retVal
= rtl8367c_getAsicReg(0x1300, ®Data
)) != RT_ERR_OK
)
2087 if((retVal
= rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK
)
2090 if(regData
!= 0x6367)
2091 return RT_ERR_CHIP_NOT_SUPPORTED
;
2093 if(media
== PORT_MEDIA_FIBER
)
2096 if ((retVal
= rtl8367c_setAsicRegBit(RTL8367C_REG_CHIP_RESET
, RTL8367C_DW8051_RST_OFFSET
, 1)) != RT_ERR_OK
)
2099 if ((retVal
= rtl8367c_setAsicRegBit(RTL8367C_REG_MISCELLANEOUS_CONFIGURE0
, RTL8367C_DW8051_EN_OFFSET
, 1)) != RT_ERR_OK
)
2102 if ((retVal
= rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY
, RTL8367C_ACS_IROM_ENABLE_OFFSET
, 1)) != RT_ERR_OK
)
2105 if ((retVal
= rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY
, RTL8367C_IROM_MSB_OFFSET
, 0)) != RT_ERR_OK
)
2108 for(idx
= 0; idx
< FIBER_INIT_SIZE
; idx
++)
2110 if ((retVal
= rtl8367c_setAsicReg(0xE000 + idx
, (rtk_uint32
)Fiber
[idx
])) != RT_ERR_OK
)
2114 if ((retVal
= rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY
, RTL8367C_IROM_MSB_OFFSET
, 0)) != RT_ERR_OK
)
2117 if ((retVal
= rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY
, RTL8367C_ACS_IROM_ENABLE_OFFSET
, 0)) != RT_ERR_OK
)
2120 if ((retVal
= rtl8367c_setAsicRegBit(RTL8367C_REG_CHIP_RESET
, RTL8367C_DW8051_RST_OFFSET
, 0)) != RT_ERR_OK
)
2125 if ((retVal
= rtl8367c_setAsicRegBit(RTL8367C_REG_UTP_FIB_DET
, RTL8367C_UTP_FIRST_OFFSET
, 1))!=RT_ERR_OK
)
2128 if ((retVal
= rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY
, RTL8367C_DW8051_READY_OFFSET
, 0)) != RT_ERR_OK
)
2136 * rtk_port_phyComboPortMedia_get
2138 * Get Combo port media type
2142 * pMedia - Media (COPPER or FIBER)
2145 * RT_ERR_FAILED - Failed
2146 * RT_ERR_SMI - SMI access error
2147 * RT_ERR_INPUT - Invalid input parameters.
2148 * RT_ERR_PORT_ID - Invalid port ID.
2150 * The API can Set Combo port media type.
2152 rtk_api_ret_t
rtk_port_phyComboPortMedia_get(rtk_port_t port
, rtk_port_media_t
*pMedia
)
2154 rtk_api_ret_t retVal
;
2158 /* Check initialization state */
2159 RTK_CHK_INIT_STATE();
2161 /* Check Port Valid */
2162 RTK_CHK_PORT_IS_UTP(port
);
2164 /* Check Combo Port ID */
2165 RTK_CHK_PORT_IS_COMBO(port
);
2167 if((retVal
= rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK
)
2170 if((retVal
= rtl8367c_getAsicReg(0x1300, ®Data
)) != RT_ERR_OK
)
2173 if((retVal
= rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK
)
2176 if(regData
!= 0x6367)
2178 *pMedia
= PORT_MEDIA_COPPER
;
2182 if ((retVal
= rtl8367c_getAsicRegBit(RTL8367C_REG_UTP_FIB_DET
, RTL8367C_UTP_FIRST_OFFSET
, &data
))!=RT_ERR_OK
)
2186 *pMedia
= PORT_MEDIA_COPPER
;
2188 *pMedia
= PORT_MEDIA_FIBER
;
2195 * rtk_port_rtctEnable_set
2199 * pPortmask - Port mask of RTCT enabled port
2204 * RT_ERR_FAILED - Failed
2205 * RT_ERR_SMI - SMI access error
2206 * RT_ERR_PORT_MASK - Invalid port mask.
2208 * The API can enable RTCT Test
2210 rtk_api_ret_t
rtk_port_rtctEnable_set(rtk_portmask_t
*pPortmask
)
2212 rtk_api_ret_t retVal
;
2214 /* Check initialization state */
2215 RTK_CHK_INIT_STATE();
2217 /* Check Port Mask Valid */
2218 RTK_CHK_PORTMASK_VALID_ONLY_UTP(pPortmask
);
2220 if ((retVal
= rtl8367c_setAsicPortRTCTEnable(pPortmask
->bits
[0]))!=RT_ERR_OK
)
2227 * rtk_port_rtctDisable_set
2231 * pPortmask - Port mask of RTCT disabled port
2236 * RT_ERR_FAILED - Failed
2237 * RT_ERR_SMI - SMI access error
2238 * RT_ERR_PORT_MASK - Invalid port mask.
2240 * The API can disable RTCT Test
2242 rtk_api_ret_t
rtk_port_rtctDisable_set(rtk_portmask_t
*pPortmask
)
2244 rtk_api_ret_t retVal
;
2246 /* Check initialization state */
2247 RTK_CHK_INIT_STATE();
2249 /* Check Port Mask Valid */
2250 RTK_CHK_PORTMASK_VALID_ONLY_UTP(pPortmask
);
2252 if ((retVal
= rtl8367c_setAsicPortRTCTDisable(pPortmask
->bits
[0]))!=RT_ERR_OK
)
2260 * rtk_port_rtctResult_get
2262 * Get the result of RTCT test
2266 * pRtctResult - The result of RTCT result
2269 * RT_ERR_FAILED - Failed
2270 * RT_ERR_SMI - SMI access error
2271 * RT_ERR_PORT_ID - Invalid port ID.
2272 * RT_ERR_PHY_RTCT_NOT_FINISH - Testing does not finish.
2274 * The API can get RTCT test result.
2275 * RTCT test may takes 4.8 seconds to finish its test at most.
2276 * Thus, if this API return RT_ERR_PHY_RTCT_NOT_FINISH or
2277 * other error code, the result can not be referenced and
2278 * user should call this API again until this API returns
2280 * The result is stored at pRtctResult->ge_result
2281 * pRtctResult->linkType is unused.
2282 * The unit of channel length is 2.5cm. Ex. 300 means 300 * 2.5 = 750cm = 7.5M
2284 rtk_api_ret_t
rtk_port_rtctResult_get(rtk_port_t port
, rtk_rtctResult_t
*pRtctResult
)
2286 rtk_api_ret_t retVal
;
2287 rtl8367c_port_rtct_result_t result
;
2289 /* Check initialization state */
2290 RTK_CHK_INIT_STATE();
2292 /* Check Port Valid */
2293 RTK_CHK_PORT_IS_UTP(port
);
2295 memset(pRtctResult
, 0x00, sizeof(rtk_rtctResult_t
));
2296 if ((retVal
= rtl8367c_getAsicPortRTCTResult(port
, &result
))!=RT_ERR_OK
)
2299 pRtctResult
->result
.ge_result
.channelALen
= result
.channelALen
;
2300 pRtctResult
->result
.ge_result
.channelBLen
= result
.channelBLen
;
2301 pRtctResult
->result
.ge_result
.channelCLen
= result
.channelCLen
;
2302 pRtctResult
->result
.ge_result
.channelDLen
= result
.channelDLen
;
2304 pRtctResult
->result
.ge_result
.channelALinedriver
= result
.channelALinedriver
;
2305 pRtctResult
->result
.ge_result
.channelBLinedriver
= result
.channelBLinedriver
;
2306 pRtctResult
->result
.ge_result
.channelCLinedriver
= result
.channelCLinedriver
;
2307 pRtctResult
->result
.ge_result
.channelDLinedriver
= result
.channelDLinedriver
;
2309 pRtctResult
->result
.ge_result
.channelAMismatch
= result
.channelAMismatch
;
2310 pRtctResult
->result
.ge_result
.channelBMismatch
= result
.channelBMismatch
;
2311 pRtctResult
->result
.ge_result
.channelCMismatch
= result
.channelCMismatch
;
2312 pRtctResult
->result
.ge_result
.channelDMismatch
= result
.channelDMismatch
;
2314 pRtctResult
->result
.ge_result
.channelAOpen
= result
.channelAOpen
;
2315 pRtctResult
->result
.ge_result
.channelBOpen
= result
.channelBOpen
;
2316 pRtctResult
->result
.ge_result
.channelCOpen
= result
.channelCOpen
;
2317 pRtctResult
->result
.ge_result
.channelDOpen
= result
.channelDOpen
;
2319 pRtctResult
->result
.ge_result
.channelAShort
= result
.channelAShort
;
2320 pRtctResult
->result
.ge_result
.channelBShort
= result
.channelBShort
;
2321 pRtctResult
->result
.ge_result
.channelCShort
= result
.channelCShort
;
2322 pRtctResult
->result
.ge_result
.channelDShort
= result
.channelDShort
;
2328 * rtk_port_sds_reset
2337 * RT_ERR_FAILED - Failed
2338 * RT_ERR_SMI - SMI access error
2339 * RT_ERR_PORT_ID - Invalid port ID.
2341 * The API can reset Serdes
2343 rtk_api_ret_t
rtk_port_sds_reset(rtk_port_t port
)
2347 /* Check initialization state */
2348 RTK_CHK_INIT_STATE();
2350 /* Check Port Valid */
2351 if(rtk_switch_isSgmiiPort(port
) != RT_ERR_OK
)
2352 return RT_ERR_PORT_ID
;
2355 return rtl8367c_sdsReset(ext_id
);
2359 * rtk_port_sgmiiLinkStatus_get
2365 * pSignalDetect - Signal detect
2370 * RT_ERR_FAILED - Failed
2371 * RT_ERR_SMI - SMI access error
2372 * RT_ERR_PORT_ID - Invalid port ID.
2374 * The API can reset Serdes
2376 rtk_api_ret_t
rtk_port_sgmiiLinkStatus_get(rtk_port_t port
, rtk_data_t
*pSignalDetect
, rtk_data_t
*pSync
, rtk_port_linkStatus_t
*pLink
)
2380 /* Check initialization state */
2381 RTK_CHK_INIT_STATE();
2383 /* Check Port Valid */
2384 if(rtk_switch_isSgmiiPort(port
) != RT_ERR_OK
)
2385 return RT_ERR_PORT_ID
;
2387 if(NULL
== pSignalDetect
)
2388 return RT_ERR_NULL_POINTER
;
2391 return RT_ERR_NULL_POINTER
;
2394 return RT_ERR_NULL_POINTER
;
2397 return rtl8367c_getSdsLinkStatus(ext_id
, (rtk_uint32
*)pSignalDetect
, (rtk_uint32
*)pSync
, (rtk_uint32
*)pLink
);
2401 * rtk_port_sgmiiNway_set
2403 * Configure SGMII/HSGMII port Nway state
2406 * state - Nway state
2411 * RT_ERR_FAILED - Failed
2412 * RT_ERR_SMI - SMI access error
2413 * RT_ERR_PORT_ID - Invalid port ID.
2415 * The API configure SGMII/HSGMII port Nway state
2417 rtk_api_ret_t
rtk_port_sgmiiNway_set(rtk_port_t port
, rtk_enable_t state
)
2421 /* Check initialization state */
2422 RTK_CHK_INIT_STATE();
2424 /* Check Port Valid */
2425 if(rtk_switch_isSgmiiPort(port
) != RT_ERR_OK
)
2426 return RT_ERR_PORT_ID
;
2428 if(state
>= RTK_ENABLE_END
)
2429 return RT_ERR_INPUT
;
2432 return rtl8367c_setSgmiiNway(ext_id
, (rtk_uint32
)state
);
2436 * rtk_port_sgmiiNway_get
2438 * Get SGMII/HSGMII port Nway state
2442 * pState - Nway state
2445 * RT_ERR_FAILED - Failed
2446 * RT_ERR_SMI - SMI access error
2447 * RT_ERR_PORT_ID - Invalid port ID.
2449 * The API can get SGMII/HSGMII port Nway state
2451 rtk_api_ret_t
rtk_port_sgmiiNway_get(rtk_port_t port
, rtk_enable_t
*pState
)
2455 /* Check initialization state */
2456 RTK_CHK_INIT_STATE();
2458 /* Check Port Valid */
2459 if(rtk_switch_isSgmiiPort(port
) != RT_ERR_OK
)
2460 return RT_ERR_PORT_ID
;
2463 return RT_ERR_NULL_POINTER
;
2466 return rtl8367c_getSgmiiNway(ext_id
, (rtk_uint32
*)pState
);