2 * Copyright (c) 2017 MediaTek Inc.
3 * Author: Ming Huang <ming.huang@mediatek.com>
4 * Sean Wang <sean.wang@mediatek.com>
6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
13 #include "mt7622.dtsi"
14 #include "mt6380.dtsi"
17 model = "Elecom WRC-2533";
18 compatible = "elecom,wrc-2533gent", "mediatek,mt7622";
21 led-boot = &led_power;
22 led-failsafe = &led_power;
23 led-running = &led_power;
24 led-upgrade = &led_power;
29 stdout-path = "serial0:115200n8";
30 bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 console=ttyS0,115200n8";
35 proc-supply = <&mt6380_vcpu_reg>;
36 sram-supply = <&mt6380_vm_reg>;
40 proc-supply = <&mt6380_vcpu_reg>;
41 sram-supply = <&mt6380_vm_reg>;
46 compatible = "gpio-keys";
47 poll-interval = <100>;
51 linux,code = <KEY_WPS_BUTTON>;
52 gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
57 linux,code = <KEY_WPS_BUTTON>;
58 gpios = <&pio 102 GPIO_ACTIVE_LOW>;
63 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
65 linux,input-type = <EV_SW>;
70 gpios = <&pio 16 GPIO_ACTIVE_LOW>;
72 linux,input-type = <EV_SW>;
77 gpios = <&pio 17 GPIO_ACTIVE_LOW>;
79 linux,input-type = <EV_SW>;
84 gpios = <&pio 18 GPIO_ACTIVE_LOW>;
86 linux,input-type = <EV_SW>;
91 compatible = "gpio-leds";
94 label = "wrc-2533:green:power";
95 gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
99 label = "wrc-2533:blue:power";
100 gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
104 label = "wrc-2533:red:power";
105 gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
109 label = "wrc-2533:blue:usb";
110 gpios = <&pio 74 GPIO_ACTIVE_HIGH>;
114 label = "wrc-2533:red:wps";
115 gpios = <&pio 76 GPIO_ACTIVE_LOW>;
119 label = "wrc-2533:blue:wifi2g";
120 gpios = <&pio 85 GPIO_ACTIVE_LOW>;
124 label = "wrc-2533:blue:wifi5g";
125 gpios = <&pio 91 GPIO_ACTIVE_LOW>;
129 reg_usb_vbus: regulator {
130 compatible = "regulator-fixed";
131 regulator-name = "usb_vbus";
132 regulator-min-microvolt = <5000000>;
133 regulator-max-microvolt = <5000000>;
134 gpio = <&pio 22 GPIO_ACTIVE_LOW>;
139 reg = <0 0x40000000 0 0x3F000000>;
142 reg_1p8v: regulator-1p8v {
143 compatible = "regulator-fixed";
144 regulator-name = "fixed-1.8V";
145 regulator-min-microvolt = <1800000>;
146 regulator-max-microvolt = <1800000>;
150 reg_3p3v: regulator-3p3v {
151 compatible = "regulator-fixed";
152 regulator-name = "fixed-3.3V";
153 regulator-min-microvolt = <3300000>;
154 regulator-max-microvolt = <3300000>;
160 compatible = "mediatek,rtk-gsw";
161 mediatek,ethsys = <ðsys>;
162 mediatek,mdio = <&mdio>;
163 mediatek,reset-pin = <&pio 54 0>;
169 pinctrl-names = "default", "pcie1_pins";
170 pinctrl-0 = <&pcie0_pins>;
171 pinctrl-1 = <&pcie1_pins>;
177 reg = <0x0000 0 0 0 0>;
178 mediatek,mtd-eeprom = <&factory 0x05000>;
188 /* eMMC is shared pin with parallel NAND */
189 emmc_pins_default: emmc-pins-default {
191 function = "emmc", "emmc_rst";
195 /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
196 * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
197 * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
200 pins = "NDL0", "NDL1", "NDL2",
201 "NDL3", "NDL4", "NDL5",
202 "NDL6", "NDL7", "NRB";
213 emmc_pins_uhs: emmc-pins-uhs {
220 pins = "NDL0", "NDL1", "NDL2",
221 "NDL3", "NDL4", "NDL5",
222 "NDL6", "NDL7", "NRB";
224 drive-strength = <4>;
230 drive-strength = <4>;
238 groups = "mdc_mdio", "rgmii_via_gmac2";
242 i2c1_pins: i2c1-pins {
249 i2c2_pins: i2c2-pins {
256 i2s1_pins: i2s1-pins {
259 groups = "i2s_out_mclk_bclk_ws",
265 pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
266 "I2S_WS", "I2S_MCLK";
267 drive-strength = <12>;
272 irrx_pins: irrx-pins {
279 irtx_pins: irtx-pins {
286 /* Parallel nand is shared pin with eMMC */
287 parallel_nand_pins: parallel-nand-pins {
294 pcie0_pins: pcie0-pins {
297 groups = "pcie0_pad_perst",
303 pcie1_pins: pcie1-pins {
306 groups = "pcie1_pad_perst",
312 pmic_bus_pins: pmic-bus-pins {
319 pwm7_pins: pwm1-2-pins {
322 groups = "pwm_ch7_2";
326 wled_pins: wled-pins {
333 sd0_pins_default: sd0-pins-default {
339 /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
340 * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
341 * DAT2, DAT3, CMD, CLK for SD respectively.
344 pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
345 "I2S2_IN","I2S4_OUT";
347 drive-strength = <8>;
352 drive-strength = <12>;
361 sd0_pins_uhs: sd0-pins-uhs {
368 pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
369 "I2S2_IN","I2S4_OUT";
380 /* Serial NAND is shared pin with SPI-NOR */
381 serial_nand_pins: serial-nand-pins {
388 spic0_pins: spic0-pins {
395 spic1_pins: spic1-pins {
402 /* SPI-NOR is shared pin with serial NAND */
403 spi_nor_pins: spi-nor-pins {
410 /* serial NAND is shared pin with SPI-NOR */
411 serial_nand_pins: serial-nand-pins {
418 uart0_pins: uart0-pins {
421 groups = "uart0_0_tx_rx" ;
425 uart2_pins: uart2-pins {
428 groups = "uart2_1_tx_rx" ;
432 watchdog_pins: watchdog-pins {
434 function = "watchdog";
449 pinctrl-names = "default";
450 pinctrl-0 = <&irrx_pins>;
456 pinctrl-names = "default";
457 pinctrl-0 = <ð_pins>;
459 compatible = "mediatek,eth-mac";
469 compatible = "mediatek,eth-mac";
479 #address-cells = <1>;
485 pinctrl-names = "default";
486 pinctrl-0 = <&i2c1_pins>;
491 pinctrl-names = "default";
492 pinctrl-0 = <&i2c2_pins>;
497 pinctrl-names = "default";
498 pinctrl-0 = <&pwm7_pins>;
503 pinctrl-names = "default";
504 pinctrl-0 = <&pmic_bus_pins>;
510 pinctrl-names = "default";
511 pinctrl-0 = <&serial_nand_pins>;
515 #address-cells = <1>;
517 compatible = "spi-nand";
518 spi-max-frequency = <104000000>;
522 compatible = "fixed-partitions";
523 #address-cells = <1>;
528 reg = <0x00000 0x0080000>;
534 reg = <0x80000 0x0040000>;
540 reg = <0xc0000 0x0080000>;
546 reg = <0x140000 0x0080000>;
550 factory: partition@1c0000 {
552 reg = <0x1c0000 0x0040000>;
558 reg = <0x200000 0x2000000>;
563 reg = <0x2200000 0x4000000>;
570 pinctrl-names = "default";
571 pinctrl-0 = <&spic0_pins>;
576 pinctrl-names = "default";
577 pinctrl-0 = <&spic1_pins>;
582 vusb33-supply = <®_3p3v>;
583 vbus-supply = <®_usb_vbus>;
592 pinctrl-names = "default";
593 pinctrl-0 = <&uart0_pins>;
598 pinctrl-names = "default";
599 pinctrl-0 = <&uart2_pins>;
604 pinctrl-names = "default";
605 pinctrl-0 = <&watchdog_pins>;
610 mediatek,mtd-eeprom = <&factory 0x0000>;