1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Weijie Gao <weijie.gao@mediatek.com>
8 #include <linux/list.h>
9 #include <linux/if_ether.h>
10 #include <linux/skbuff.h>
11 #include <linux/netdevice.h>
12 #include <linux/netlink.h>
13 #include <linux/bitops.h>
14 #include <net/genetlink.h>
15 #include <linux/delay.h>
16 #include <linux/phy.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/lockdep.h>
20 #include <linux/workqueue.h>
21 #include <linux/of_device.h>
24 #include "mt753x_swconfig.h"
25 #include "mt753x_regs.h"
27 #define MT753X_PORT_MIB_TXB_ID 18 /* TxByte */
28 #define MT753X_PORT_MIB_RXB_ID 37 /* RxByte */
30 #define MIB_DESC(_s, _o, _n) \
37 struct mt753x_mib_desc
{
43 static const struct mt753x_mib_desc mt753x_mibs
[] = {
44 MIB_DESC(1, STATS_TDPC
, "TxDrop"),
45 MIB_DESC(1, STATS_TCRC
, "TxCRC"),
46 MIB_DESC(1, STATS_TUPC
, "TxUni"),
47 MIB_DESC(1, STATS_TMPC
, "TxMulti"),
48 MIB_DESC(1, STATS_TBPC
, "TxBroad"),
49 MIB_DESC(1, STATS_TCEC
, "TxCollision"),
50 MIB_DESC(1, STATS_TSCEC
, "TxSingleCol"),
51 MIB_DESC(1, STATS_TMCEC
, "TxMultiCol"),
52 MIB_DESC(1, STATS_TDEC
, "TxDefer"),
53 MIB_DESC(1, STATS_TLCEC
, "TxLateCol"),
54 MIB_DESC(1, STATS_TXCEC
, "TxExcCol"),
55 MIB_DESC(1, STATS_TPPC
, "TxPause"),
56 MIB_DESC(1, STATS_TL64PC
, "Tx64Byte"),
57 MIB_DESC(1, STATS_TL65PC
, "Tx65Byte"),
58 MIB_DESC(1, STATS_TL128PC
, "Tx128Byte"),
59 MIB_DESC(1, STATS_TL256PC
, "Tx256Byte"),
60 MIB_DESC(1, STATS_TL512PC
, "Tx512Byte"),
61 MIB_DESC(1, STATS_TL1024PC
, "Tx1024Byte"),
62 MIB_DESC(2, STATS_TOC
, "TxByte"),
63 MIB_DESC(1, STATS_RDPC
, "RxDrop"),
64 MIB_DESC(1, STATS_RFPC
, "RxFiltered"),
65 MIB_DESC(1, STATS_RUPC
, "RxUni"),
66 MIB_DESC(1, STATS_RMPC
, "RxMulti"),
67 MIB_DESC(1, STATS_RBPC
, "RxBroad"),
68 MIB_DESC(1, STATS_RAEPC
, "RxAlignErr"),
69 MIB_DESC(1, STATS_RCEPC
, "RxCRC"),
70 MIB_DESC(1, STATS_RUSPC
, "RxUnderSize"),
71 MIB_DESC(1, STATS_RFEPC
, "RxFragment"),
72 MIB_DESC(1, STATS_ROSPC
, "RxOverSize"),
73 MIB_DESC(1, STATS_RJEPC
, "RxJabber"),
74 MIB_DESC(1, STATS_RPPC
, "RxPause"),
75 MIB_DESC(1, STATS_RL64PC
, "Rx64Byte"),
76 MIB_DESC(1, STATS_RL65PC
, "Rx65Byte"),
77 MIB_DESC(1, STATS_RL128PC
, "Rx128Byte"),
78 MIB_DESC(1, STATS_RL256PC
, "Rx256Byte"),
79 MIB_DESC(1, STATS_RL512PC
, "Rx512Byte"),
80 MIB_DESC(1, STATS_RL1024PC
, "Rx1024Byte"),
81 MIB_DESC(2, STATS_ROC
, "RxByte"),
82 MIB_DESC(1, STATS_RDPC_CTRL
, "RxCtrlDrop"),
83 MIB_DESC(1, STATS_RDPC_ING
, "RxIngDrop"),
84 MIB_DESC(1, STATS_RDPC_ARL
, "RxARLDrop")
88 /* Global attributes. */
89 MT753X_ATTR_ENABLE_VLAN
,
92 static int mt753x_get_vlan_enable(struct switch_dev
*dev
,
93 const struct switch_attr
*attr
,
94 struct switch_val
*val
)
96 struct gsw_mt753x
*gsw
= container_of(dev
, struct gsw_mt753x
, swdev
);
98 val
->value
.i
= gsw
->global_vlan_enable
;
103 static int mt753x_set_vlan_enable(struct switch_dev
*dev
,
104 const struct switch_attr
*attr
,
105 struct switch_val
*val
)
107 struct gsw_mt753x
*gsw
= container_of(dev
, struct gsw_mt753x
, swdev
);
109 gsw
->global_vlan_enable
= val
->value
.i
!= 0;
114 static int mt753x_get_port_pvid(struct switch_dev
*dev
, int port
, int *val
)
116 struct gsw_mt753x
*gsw
= container_of(dev
, struct gsw_mt753x
, swdev
);
118 if (port
>= MT753X_NUM_PORTS
)
121 *val
= mt753x_reg_read(gsw
, PPBV1(port
));
122 *val
&= GRP_PORT_VID_M
;
127 static int mt753x_set_port_pvid(struct switch_dev
*dev
, int port
, int pvid
)
129 struct gsw_mt753x
*gsw
= container_of(dev
, struct gsw_mt753x
, swdev
);
131 if (port
>= MT753X_NUM_PORTS
)
134 if (pvid
< MT753X_MIN_VID
|| pvid
> MT753X_MAX_VID
)
137 gsw
->port_entries
[port
].pvid
= pvid
;
142 static int mt753x_get_vlan_ports(struct switch_dev
*dev
, struct switch_val
*val
)
144 struct gsw_mt753x
*gsw
= container_of(dev
, struct gsw_mt753x
, swdev
);
151 if (val
->port_vlan
< 0 || val
->port_vlan
>= MT753X_NUM_VLANS
)
154 mt753x_vlan_ctrl(gsw
, VTCR_READ_VLAN_ENTRY
, val
->port_vlan
);
156 member
= mt753x_reg_read(gsw
, VAWD1
);
157 member
&= PORT_MEM_M
;
158 member
>>= PORT_MEM_S
;
160 etags
= mt753x_reg_read(gsw
, VAWD2
);
162 for (i
= 0; i
< MT753X_NUM_PORTS
; i
++) {
163 struct switch_port
*p
;
166 if (!(member
& BIT(i
)))
169 p
= &val
->value
.ports
[val
->len
++];
172 etag
= (etags
>> PORT_ETAG_S(i
)) & PORT_ETAG_M
;
174 if (etag
== ETAG_CTRL_TAG
)
175 p
->flags
|= BIT(SWITCH_PORT_FLAG_TAGGED
);
176 else if (etag
!= ETAG_CTRL_UNTAG
)
178 "vlan egress tag control neither untag nor tag.\n");
184 static int mt753x_set_vlan_ports(struct switch_dev
*dev
, struct switch_val
*val
)
186 struct gsw_mt753x
*gsw
= container_of(dev
, struct gsw_mt753x
, swdev
);
191 if (val
->port_vlan
< 0 || val
->port_vlan
>= MT753X_NUM_VLANS
||
192 val
->len
> MT753X_NUM_PORTS
)
195 for (i
= 0; i
< val
->len
; i
++) {
196 struct switch_port
*p
= &val
->value
.ports
[i
];
198 if (p
->id
>= MT753X_NUM_PORTS
)
201 member
|= BIT(p
->id
);
203 if (p
->flags
& BIT(SWITCH_PORT_FLAG_TAGGED
))
207 gsw
->vlan_entries
[val
->port_vlan
].member
= member
;
208 gsw
->vlan_entries
[val
->port_vlan
].etags
= etags
;
213 static int mt753x_set_vid(struct switch_dev
*dev
,
214 const struct switch_attr
*attr
,
215 struct switch_val
*val
)
217 struct gsw_mt753x
*gsw
= container_of(dev
, struct gsw_mt753x
, swdev
);
221 vlan
= val
->port_vlan
;
222 vid
= (u16
)val
->value
.i
;
224 if (vlan
< 0 || vlan
>= MT753X_NUM_VLANS
)
227 if (vid
< MT753X_MIN_VID
|| vid
> MT753X_MAX_VID
)
230 gsw
->vlan_entries
[vlan
].vid
= vid
;
234 static int mt753x_get_vid(struct switch_dev
*dev
,
235 const struct switch_attr
*attr
,
236 struct switch_val
*val
)
238 val
->value
.i
= val
->port_vlan
;
242 static int mt753x_get_port_link(struct switch_dev
*dev
, int port
,
243 struct switch_port_link
*link
)
245 struct gsw_mt753x
*gsw
= container_of(dev
, struct gsw_mt753x
, swdev
);
248 if (port
< 0 || port
>= MT753X_NUM_PORTS
)
251 pmsr
= mt753x_reg_read(gsw
, PMSR(port
));
253 link
->link
= pmsr
& MAC_LNK_STS
;
254 link
->duplex
= pmsr
& MAC_DPX_STS
;
255 speed
= (pmsr
& MAC_SPD_STS_M
) >> MAC_SPD_STS_S
;
259 link
->speed
= SWITCH_PORT_SPEED_10
;
262 link
->speed
= SWITCH_PORT_SPEED_100
;
265 link
->speed
= SWITCH_PORT_SPEED_1000
;
268 /* TODO: swconfig has no support for 2500 now */
269 link
->speed
= SWITCH_PORT_SPEED_UNKNOWN
;
276 static int mt753x_set_port_link(struct switch_dev
*dev
, int port
,
277 struct switch_port_link
*link
)
280 if (port
>= MT753X_NUM_PHYS
)
283 return switch_generic_set_link(dev
, port
, link
);
289 static u64
get_mib_counter(struct gsw_mt753x
*gsw
, int i
, int port
)
294 offset
= mt753x_mibs
[i
].offset
;
296 if (mt753x_mibs
[i
].size
== 1)
297 return mt753x_reg_read(gsw
, MIB_COUNTER_REG(port
, offset
));
300 hi
= mt753x_reg_read(gsw
, MIB_COUNTER_REG(port
, offset
+ 4));
301 lo
= mt753x_reg_read(gsw
, MIB_COUNTER_REG(port
, offset
));
302 hi2
= mt753x_reg_read(gsw
, MIB_COUNTER_REG(port
, offset
+ 4));
305 return (hi
<< 32) | lo
;
308 static int mt753x_get_port_mib(struct switch_dev
*dev
,
309 const struct switch_attr
*attr
,
310 struct switch_val
*val
)
312 static char buf
[4096];
313 struct gsw_mt753x
*gsw
= container_of(dev
, struct gsw_mt753x
, swdev
);
316 if (val
->port_vlan
>= MT753X_NUM_PORTS
)
319 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
,
320 "Port %d MIB counters\n", val
->port_vlan
);
322 for (i
= 0; i
< ARRAY_SIZE(mt753x_mibs
); ++i
) {
325 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
,
326 "%-11s: ", mt753x_mibs
[i
].name
);
327 counter
= get_mib_counter(gsw
, i
, val
->port_vlan
);
328 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
, "%llu\n",
337 static int mt753x_get_port_stats(struct switch_dev
*dev
, int port
,
338 struct switch_port_stats
*stats
)
340 struct gsw_mt753x
*gsw
= container_of(dev
, struct gsw_mt753x
, swdev
);
342 if (port
< 0 || port
>= MT753X_NUM_PORTS
)
345 stats
->tx_bytes
= get_mib_counter(gsw
, MT753X_PORT_MIB_TXB_ID
, port
);
346 stats
->rx_bytes
= get_mib_counter(gsw
, MT753X_PORT_MIB_RXB_ID
, port
);
351 static void mt753x_port_isolation(struct gsw_mt753x
*gsw
)
355 for (i
= 0; i
< MT753X_NUM_PORTS
; i
++)
356 mt753x_reg_write(gsw
, PCR(i
),
357 BIT(gsw
->cpu_port
) << PORT_MATRIX_S
);
359 mt753x_reg_write(gsw
, PCR(gsw
->cpu_port
), PORT_MATRIX_M
);
361 for (i
= 0; i
< MT753X_NUM_PORTS
; i
++)
362 mt753x_reg_write(gsw
, PVC(i
),
363 (0x8100 << STAG_VPID_S
) |
364 (VA_TRANSPARENT_PORT
<< VLAN_ATTR_S
));
367 static int mt753x_apply_config(struct switch_dev
*dev
)
369 struct gsw_mt753x
*gsw
= container_of(dev
, struct gsw_mt753x
, swdev
);
371 if (!gsw
->global_vlan_enable
) {
372 mt753x_port_isolation(gsw
);
376 mt753x_apply_vlan_config(gsw
);
381 static int mt753x_reset_switch(struct switch_dev
*dev
)
383 struct gsw_mt753x
*gsw
= container_of(dev
, struct gsw_mt753x
, swdev
);
386 memset(gsw
->port_entries
, 0, sizeof(gsw
->port_entries
));
387 memset(gsw
->vlan_entries
, 0, sizeof(gsw
->vlan_entries
));
389 /* set default vid of each vlan to the same number of vlan, so the vid
390 * won't need be set explicitly.
392 for (i
= 0; i
< MT753X_NUM_VLANS
; i
++)
393 gsw
->vlan_entries
[i
].vid
= i
;
398 static int mt753x_phy_read16(struct switch_dev
*dev
, int addr
, u8 reg
,
401 struct gsw_mt753x
*gsw
= container_of(dev
, struct gsw_mt753x
, swdev
);
403 *value
= gsw
->mii_read(gsw
, addr
, reg
);
408 static int mt753x_phy_write16(struct switch_dev
*dev
, int addr
, u8 reg
,
411 struct gsw_mt753x
*gsw
= container_of(dev
, struct gsw_mt753x
, swdev
);
413 gsw
->mii_write(gsw
, addr
, reg
, value
);
418 static const struct switch_attr mt753x_global
[] = {
420 .type
= SWITCH_TYPE_INT
,
421 .name
= "enable_vlan",
422 .description
= "VLAN mode (1:enabled)",
424 .id
= MT753X_ATTR_ENABLE_VLAN
,
425 .get
= mt753x_get_vlan_enable
,
426 .set
= mt753x_set_vlan_enable
,
430 static const struct switch_attr mt753x_port
[] = {
432 .type
= SWITCH_TYPE_STRING
,
434 .description
= "Get MIB counters for port",
435 .get
= mt753x_get_port_mib
,
440 static const struct switch_attr mt753x_vlan
[] = {
442 .type
= SWITCH_TYPE_INT
,
444 .description
= "VLAN ID (0-4094)",
445 .set
= mt753x_set_vid
,
446 .get
= mt753x_get_vid
,
451 static const struct switch_dev_ops mt753x_swdev_ops
= {
453 .attr
= mt753x_global
,
454 .n_attr
= ARRAY_SIZE(mt753x_global
),
458 .n_attr
= ARRAY_SIZE(mt753x_port
),
462 .n_attr
= ARRAY_SIZE(mt753x_vlan
),
464 .get_vlan_ports
= mt753x_get_vlan_ports
,
465 .set_vlan_ports
= mt753x_set_vlan_ports
,
466 .get_port_pvid
= mt753x_get_port_pvid
,
467 .set_port_pvid
= mt753x_set_port_pvid
,
468 .get_port_link
= mt753x_get_port_link
,
469 .set_port_link
= mt753x_set_port_link
,
470 .get_port_stats
= mt753x_get_port_stats
,
471 .apply_config
= mt753x_apply_config
,
472 .reset_switch
= mt753x_reset_switch
,
473 .phy_read16
= mt753x_phy_read16
,
474 .phy_write16
= mt753x_phy_write16
,
477 int mt753x_swconfig_init(struct gsw_mt753x
*gsw
)
479 struct device_node
*np
= gsw
->dev
->of_node
;
480 struct switch_dev
*swdev
;
483 if (of_property_read_u32(np
, "mediatek,cpuport", &gsw
->cpu_port
))
484 gsw
->cpu_port
= MT753X_DFL_CPU_PORT
;
488 swdev
->name
= gsw
->name
;
489 swdev
->alias
= gsw
->name
;
490 swdev
->cpu_port
= gsw
->cpu_port
;
491 swdev
->ports
= MT753X_NUM_PORTS
;
492 swdev
->vlans
= MT753X_NUM_VLANS
;
493 swdev
->ops
= &mt753x_swdev_ops
;
495 ret
= register_switch(swdev
, NULL
);
497 dev_notice(gsw
->dev
, "Failed to register switch %s\n",
502 mt753x_apply_config(swdev
);
507 void mt753x_swconfig_destroy(struct gsw_mt753x
*gsw
)
509 unregister_switch(&gsw
->swdev
);