1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2021 MediaTek Inc.
4 * Author: Sam.Shih <sam.shih@mediatek.com>
8 #include "mt7986b.dtsi"
11 model = "MediaTek MT7986b RFB";
12 compatible = "mediatek,mt7986b-rfb";
19 stdout-path = "serial0:115200n8";
23 reg = <0 0x40000000 0 0x40000000>;
26 reg_3p3v: regulator-3p3v {
27 compatible = "regulator-fixed";
28 regulator-name = "fixed-3.3V";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
35 reg_5v: regulator-5v {
36 compatible = "regulator-fixed";
37 regulator-name = "fixed-5V";
38 regulator-min-microvolt = <5000000>;
39 regulator-max-microvolt = <5000000>;
46 vusb33-supply = <®_3p3v>;
47 vbus-supply = <®_5v>;
61 pinctrl-names = "default", "dbdc";
62 pinctrl-0 = <&wf_2g_5g_pins>;
63 pinctrl-1 = <&wf_dbdc_pins>;
70 compatible = "mediatek,eth-mac";
72 phy-mode = "2500base-x";
82 compatible = "mediatek,eth-mac";
84 phy-mode = "2500base-x";
98 compatible = "ethernet-phy-id67c9.de0a";
100 reset-gpios = <&pio 6 1>;
101 reset-deassert-us = <20000>;
102 phy-mode = "2500base-x";
106 compatible = "ethernet-phy-id67c9.de0a";
108 phy-mode = "2500base-x";
112 compatible = "mediatek,mt7531";
114 reset-gpios = <&pio 5 0>;
117 #address-cells = <1>;
143 phy-mode = "2500base-x";
161 wf_2g_5g_pins: wf_2g_5g-pins {
164 groups = "wf_2g", "wf_5g";
167 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
168 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
169 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
170 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
171 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
172 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
173 "WF1_TOP_CLK", "WF1_TOP_DATA";
174 drive-strength = <4>;
178 wf_dbdc_pins: wf_dbdc-pins {
184 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
185 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
186 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
187 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
188 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
189 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
190 "WF1_TOP_CLK", "WF1_TOP_DATA";
191 drive-strength = <4>;