1 // SPDX-License-Identifier: GPL-2.0
3 * The MT7988 driver based on Linux generic pinctrl binding.
5 * Copyright (C) 2020 MediaTek Inc.
6 * Author: Sam Shih <sam.shih@mediatek.com>
9 #include "pinctrl-moore.h"
11 enum MT7988_PINCTRL_REG_PAGE
{
20 #define MT7988_PIN(_number, _name) MTK_PIN(_number, _name, 0, _number, DRV_GRP4)
22 #define PIN_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \
24 PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \
27 #define PINS_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \
29 PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \
32 static const struct mtk_pin_field_calc mt7988_pin_mode_range
[] = {
33 PIN_FIELD(0, 83, 0x300, 0x10, 0, 4),
36 static const struct mtk_pin_field_calc mt7988_pin_dir_range
[] = {
37 PIN_FIELD(0, 83, 0x0, 0x10, 0, 1),
40 static const struct mtk_pin_field_calc mt7988_pin_di_range
[] = {
41 PIN_FIELD(0, 83, 0x200, 0x10, 0, 1),
44 static const struct mtk_pin_field_calc mt7988_pin_do_range
[] = {
45 PIN_FIELD(0, 83, 0x100, 0x10, 0, 1),
48 static const struct mtk_pin_field_calc mt7988_pin_ies_range
[] = {
49 PIN_FIELD_BASE(0, 0, 5, 0x30, 0x10, 13, 1),
50 PIN_FIELD_BASE(1, 1, 5, 0x30, 0x10, 14, 1),
51 PIN_FIELD_BASE(2, 2, 5, 0x30, 0x10, 11, 1),
52 PIN_FIELD_BASE(3, 3, 5, 0x30, 0x10, 12, 1),
53 PIN_FIELD_BASE(4, 4, 5, 0x30, 0x10, 0, 1),
54 PIN_FIELD_BASE(5, 5, 5, 0x30, 0x10, 9, 1),
55 PIN_FIELD_BASE(6, 6, 5, 0x30, 0x10, 10, 1),
57 PIN_FIELD_BASE(7, 7, 4, 0x30, 0x10, 8, 1),
58 PIN_FIELD_BASE(8, 8, 4, 0x30, 0x10, 6, 1),
59 PIN_FIELD_BASE(9, 9, 4, 0x30, 0x10, 5, 1),
60 PIN_FIELD_BASE(10, 10, 4, 0x30, 0x10, 3, 1),
62 PIN_FIELD_BASE(11, 11, 1, 0x40, 0x10, 0, 1),
63 PIN_FIELD_BASE(12, 12, 1, 0x40, 0x10, 21, 1),
64 PIN_FIELD_BASE(13, 13, 1, 0x40, 0x10, 1, 1),
65 PIN_FIELD_BASE(14, 14, 1, 0x40, 0x10, 2, 1),
67 PIN_FIELD_BASE(15, 15, 5, 0x30, 0x10, 7, 1),
68 PIN_FIELD_BASE(16, 16, 5, 0x30, 0x10, 8, 1),
69 PIN_FIELD_BASE(17, 17, 5, 0x30, 0x10, 3, 1),
70 PIN_FIELD_BASE(18, 18, 5, 0x30, 0x10, 4, 1),
72 PIN_FIELD_BASE(19, 19, 4, 0x30, 0x10, 7, 1),
73 PIN_FIELD_BASE(20, 20, 4, 0x30, 0x10, 4, 1),
75 PIN_FIELD_BASE(21, 21, 3, 0x50, 0x10, 17, 1),
76 PIN_FIELD_BASE(22, 22, 3, 0x50, 0x10, 23, 1),
77 PIN_FIELD_BASE(23, 23, 3, 0x50, 0x10, 20, 1),
78 PIN_FIELD_BASE(24, 24, 3, 0x50, 0x10, 19, 1),
79 PIN_FIELD_BASE(25, 25, 3, 0x50, 0x10, 21, 1),
80 PIN_FIELD_BASE(26, 26, 3, 0x50, 0x10, 22, 1),
81 PIN_FIELD_BASE(27, 27, 3, 0x50, 0x10, 18, 1),
82 PIN_FIELD_BASE(28, 28, 3, 0x50, 0x10, 25, 1),
83 PIN_FIELD_BASE(29, 29, 3, 0x50, 0x10, 26, 1),
84 PIN_FIELD_BASE(30, 30, 3, 0x50, 0x10, 27, 1),
85 PIN_FIELD_BASE(31, 31, 3, 0x50, 0x10, 24, 1),
86 PIN_FIELD_BASE(32, 32, 3, 0x50, 0x10, 28, 1),
87 PIN_FIELD_BASE(33, 33, 3, 0x60, 0x10, 0, 1),
88 PIN_FIELD_BASE(34, 34, 3, 0x50, 0x10, 31, 1),
89 PIN_FIELD_BASE(35, 35, 3, 0x50, 0x10, 29, 1),
90 PIN_FIELD_BASE(36, 36, 3, 0x50, 0x10, 30, 1),
91 PIN_FIELD_BASE(37, 37, 3, 0x60, 0x10, 1, 1),
92 PIN_FIELD_BASE(38, 38, 3, 0x50, 0x10, 11, 1),
93 PIN_FIELD_BASE(39, 39, 3, 0x50, 0x10, 10, 1),
94 PIN_FIELD_BASE(40, 40, 3, 0x50, 0x10, 0, 1),
95 PIN_FIELD_BASE(41, 41, 3, 0x50, 0x10, 1, 1),
96 PIN_FIELD_BASE(42, 42, 3, 0x50, 0x10, 9, 1),
97 PIN_FIELD_BASE(43, 43, 3, 0x50, 0x10, 8, 1),
98 PIN_FIELD_BASE(44, 44, 3, 0x50, 0x10, 7, 1),
99 PIN_FIELD_BASE(45, 45, 3, 0x50, 0x10, 6, 1),
100 PIN_FIELD_BASE(46, 46, 3, 0x50, 0x10, 5, 1),
101 PIN_FIELD_BASE(47, 47, 3, 0x50, 0x10, 4, 1),
102 PIN_FIELD_BASE(48, 48, 3, 0x50, 0x10, 3, 1),
103 PIN_FIELD_BASE(49, 49, 3, 0x50, 0x10, 2, 1),
104 PIN_FIELD_BASE(50, 50, 3, 0x50, 0x10, 15, 1),
105 PIN_FIELD_BASE(51, 51, 3, 0x50, 0x10, 12, 1),
106 PIN_FIELD_BASE(52, 52, 3, 0x50, 0x10, 13, 1),
107 PIN_FIELD_BASE(53, 53, 3, 0x50, 0x10, 14, 1),
108 PIN_FIELD_BASE(54, 54, 3, 0x50, 0x10, 16, 1),
110 PIN_FIELD_BASE(55, 55, 1, 0x40, 0x10, 14, 1),
111 PIN_FIELD_BASE(56, 56, 1, 0x40, 0x10, 15, 1),
112 PIN_FIELD_BASE(57, 57, 1, 0x40, 0x10, 13, 1),
113 PIN_FIELD_BASE(58, 58, 1, 0x40, 0x10, 4, 1),
114 PIN_FIELD_BASE(59, 59, 1, 0x40, 0x10, 5, 1),
115 PIN_FIELD_BASE(60, 60, 1, 0x40, 0x10, 6, 1),
116 PIN_FIELD_BASE(61, 61, 1, 0x40, 0x10, 3, 1),
117 PIN_FIELD_BASE(62, 62, 1, 0x40, 0x10, 7, 1),
118 PIN_FIELD_BASE(63, 63, 1, 0x40, 0x10, 20, 1),
119 PIN_FIELD_BASE(64, 64, 1, 0x40, 0x10, 8, 1),
120 PIN_FIELD_BASE(65, 65, 1, 0x40, 0x10, 9, 1),
121 PIN_FIELD_BASE(66, 66, 1, 0x40, 0x10, 10, 1),
122 PIN_FIELD_BASE(67, 67, 1, 0x40, 0x10, 11, 1),
123 PIN_FIELD_BASE(68, 68, 1, 0x40, 0x10, 12, 1),
125 PIN_FIELD_BASE(69, 69, 5, 0x30, 0x10, 1, 1),
126 PIN_FIELD_BASE(70, 70, 5, 0x30, 0x10, 2, 1),
127 PIN_FIELD_BASE(71, 71, 5, 0x30, 0x10, 5, 1),
128 PIN_FIELD_BASE(72, 72, 5, 0x30, 0x10, 6, 1),
130 PIN_FIELD_BASE(73, 73, 4, 0x30, 0x10, 10, 1),
131 PIN_FIELD_BASE(74, 74, 4, 0x30, 0x10, 1, 1),
132 PIN_FIELD_BASE(75, 75, 4, 0x30, 0x10, 11, 1),
133 PIN_FIELD_BASE(76, 76, 4, 0x30, 0x10, 9, 1),
134 PIN_FIELD_BASE(77, 77, 4, 0x30, 0x10, 2, 1),
135 PIN_FIELD_BASE(78, 78, 4, 0x30, 0x10, 0, 1),
136 PIN_FIELD_BASE(79, 79, 4, 0x30, 0x10, 12, 1),
138 PIN_FIELD_BASE(80, 80, 1, 0x40, 0x10, 18, 1),
139 PIN_FIELD_BASE(81, 81, 1, 0x40, 0x10, 19, 1),
140 PIN_FIELD_BASE(82, 82, 1, 0x40, 0x10, 16, 1),
141 PIN_FIELD_BASE(83, 83, 1, 0x40, 0x10, 17, 1),
144 static const struct mtk_pin_field_calc mt7988_pin_smt_range
[] = {
145 PIN_FIELD_BASE(0, 0, 5, 0xc0, 0x10, 13, 1),
146 PIN_FIELD_BASE(1, 1, 5, 0xc0, 0x10, 14, 1),
147 PIN_FIELD_BASE(2, 2, 5, 0xc0, 0x10, 11, 1),
148 PIN_FIELD_BASE(3, 3, 5, 0xc0, 0x10, 12, 1),
149 PIN_FIELD_BASE(4, 4, 5, 0xc0, 0x10, 0, 1),
150 PIN_FIELD_BASE(5, 5, 5, 0xc0, 0x10, 9, 1),
151 PIN_FIELD_BASE(6, 6, 5, 0xc0, 0x10, 10, 1),
153 PIN_FIELD_BASE(7, 7, 4, 0xb0, 0x10, 8, 1),
154 PIN_FIELD_BASE(8, 8, 4, 0xb0, 0x10, 6, 1),
155 PIN_FIELD_BASE(9, 9, 4, 0xb0, 0x10, 5, 1),
156 PIN_FIELD_BASE(10, 10, 4, 0xb0, 0x10, 3, 1),
158 PIN_FIELD_BASE(11, 11, 1, 0xe0, 0x10, 0, 1),
159 PIN_FIELD_BASE(12, 12, 1, 0xe0, 0x10, 21, 1),
160 PIN_FIELD_BASE(13, 13, 1, 0xe0, 0x10, 1, 1),
161 PIN_FIELD_BASE(14, 14, 1, 0xe0, 0x10, 2, 1),
163 PIN_FIELD_BASE(15, 15, 5, 0xc0, 0x10, 7, 1),
164 PIN_FIELD_BASE(16, 16, 5, 0xc0, 0x10, 8, 1),
165 PIN_FIELD_BASE(17, 17, 5, 0xc0, 0x10, 3, 1),
166 PIN_FIELD_BASE(18, 18, 5, 0xc0, 0x10, 4, 1),
168 PIN_FIELD_BASE(19, 19, 4, 0xb0, 0x10, 7, 1),
169 PIN_FIELD_BASE(20, 20, 4, 0xb0, 0x10, 4, 1),
171 PIN_FIELD_BASE(21, 21, 3, 0x140, 0x10, 17, 1),
172 PIN_FIELD_BASE(22, 22, 3, 0x140, 0x10, 23, 1),
173 PIN_FIELD_BASE(23, 23, 3, 0x140, 0x10, 20, 1),
174 PIN_FIELD_BASE(24, 24, 3, 0x140, 0x10, 19, 1),
175 PIN_FIELD_BASE(25, 25, 3, 0x140, 0x10, 21, 1),
176 PIN_FIELD_BASE(26, 26, 3, 0x140, 0x10, 22, 1),
177 PIN_FIELD_BASE(27, 27, 3, 0x140, 0x10, 18, 1),
178 PIN_FIELD_BASE(28, 28, 3, 0x140, 0x10, 25, 1),
179 PIN_FIELD_BASE(29, 29, 3, 0x140, 0x10, 26, 1),
180 PIN_FIELD_BASE(30, 30, 3, 0x140, 0x10, 27, 1),
181 PIN_FIELD_BASE(31, 31, 3, 0x140, 0x10, 24, 1),
182 PIN_FIELD_BASE(32, 32, 3, 0x140, 0x10, 28, 1),
183 PIN_FIELD_BASE(33, 33, 3, 0x150, 0x10, 0, 1),
184 PIN_FIELD_BASE(34, 34, 3, 0x140, 0x10, 31, 1),
185 PIN_FIELD_BASE(35, 35, 3, 0x140, 0x10, 29, 1),
186 PIN_FIELD_BASE(36, 36, 3, 0x140, 0x10, 30, 1),
187 PIN_FIELD_BASE(37, 37, 3, 0x150, 0x10, 1, 1),
188 PIN_FIELD_BASE(38, 38, 3, 0x140, 0x10, 11, 1),
189 PIN_FIELD_BASE(39, 39, 3, 0x140, 0x10, 10, 1),
190 PIN_FIELD_BASE(40, 40, 3, 0x140, 0x10, 0, 1),
191 PIN_FIELD_BASE(41, 41, 3, 0x140, 0x10, 1, 1),
192 PIN_FIELD_BASE(42, 42, 3, 0x140, 0x10, 9, 1),
193 PIN_FIELD_BASE(43, 43, 3, 0x140, 0x10, 8, 1),
194 PIN_FIELD_BASE(44, 44, 3, 0x140, 0x10, 7, 1),
195 PIN_FIELD_BASE(45, 45, 3, 0x140, 0x10, 6, 1),
196 PIN_FIELD_BASE(46, 46, 3, 0x140, 0x10, 5, 1),
197 PIN_FIELD_BASE(47, 47, 3, 0x140, 0x10, 4, 1),
198 PIN_FIELD_BASE(48, 48, 3, 0x140, 0x10, 3, 1),
199 PIN_FIELD_BASE(49, 49, 3, 0x140, 0x10, 2, 1),
200 PIN_FIELD_BASE(50, 50, 3, 0x140, 0x10, 15, 1),
201 PIN_FIELD_BASE(51, 51, 3, 0x140, 0x10, 12, 1),
202 PIN_FIELD_BASE(52, 52, 3, 0x140, 0x10, 13, 1),
203 PIN_FIELD_BASE(53, 53, 3, 0x140, 0x10, 14, 1),
204 PIN_FIELD_BASE(54, 54, 3, 0x140, 0x10, 16, 1),
206 PIN_FIELD_BASE(55, 55, 1, 0xe0, 0x10, 14, 1),
207 PIN_FIELD_BASE(56, 56, 1, 0xe0, 0x10, 15, 1),
208 PIN_FIELD_BASE(57, 57, 1, 0xe0, 0x10, 13, 1),
209 PIN_FIELD_BASE(58, 58, 1, 0xe0, 0x10, 4, 1),
210 PIN_FIELD_BASE(59, 59, 1, 0xe0, 0x10, 5, 1),
211 PIN_FIELD_BASE(60, 60, 1, 0xe0, 0x10, 6, 1),
212 PIN_FIELD_BASE(61, 61, 1, 0xe0, 0x10, 3, 1),
213 PIN_FIELD_BASE(62, 62, 1, 0xe0, 0x10, 7, 1),
214 PIN_FIELD_BASE(63, 63, 1, 0xe0, 0x10, 20, 1),
215 PIN_FIELD_BASE(64, 64, 1, 0xe0, 0x10, 8, 1),
216 PIN_FIELD_BASE(65, 65, 1, 0xe0, 0x10, 9, 1),
217 PIN_FIELD_BASE(66, 66, 1, 0xe0, 0x10, 10, 1),
218 PIN_FIELD_BASE(67, 67, 1, 0xe0, 0x10, 11, 1),
219 PIN_FIELD_BASE(68, 68, 1, 0xe0, 0x10, 12, 1),
221 PIN_FIELD_BASE(69, 69, 5, 0xc0, 0x10, 1, 1),
222 PIN_FIELD_BASE(70, 70, 5, 0xc0, 0x10, 2, 1),
223 PIN_FIELD_BASE(71, 71, 5, 0xc0, 0x10, 5, 1),
224 PIN_FIELD_BASE(72, 72, 5, 0xc0, 0x10, 6, 1),
226 PIN_FIELD_BASE(73, 73, 4, 0xb0, 0x10, 10, 1),
227 PIN_FIELD_BASE(74, 74, 4, 0xb0, 0x10, 1, 1),
228 PIN_FIELD_BASE(75, 75, 4, 0xb0, 0x10, 11, 1),
229 PIN_FIELD_BASE(76, 76, 4, 0xb0, 0x10, 9, 1),
230 PIN_FIELD_BASE(77, 77, 4, 0xb0, 0x10, 2, 1),
231 PIN_FIELD_BASE(78, 78, 4, 0xb0, 0x10, 0, 1),
232 PIN_FIELD_BASE(79, 79, 4, 0xb0, 0x10, 12, 1),
234 PIN_FIELD_BASE(80, 80, 1, 0xe0, 0x10, 18, 1),
235 PIN_FIELD_BASE(81, 81, 1, 0xe0, 0x10, 19, 1),
236 PIN_FIELD_BASE(82, 82, 1, 0xe0, 0x10, 16, 1),
237 PIN_FIELD_BASE(83, 83, 1, 0xe0, 0x10, 17, 1),
240 static const struct mtk_pin_field_calc mt7988_pin_pu_range
[] = {
241 PIN_FIELD_BASE(7, 7, 4, 0x60, 0x10, 5, 1),
242 PIN_FIELD_BASE(8, 8, 4, 0x60, 0x10, 4, 1),
243 PIN_FIELD_BASE(9, 9, 4, 0x60, 0x10, 3, 1),
244 PIN_FIELD_BASE(10, 10, 4, 0x60, 0x10, 2, 1),
246 PIN_FIELD_BASE(13, 13, 1, 0x70, 0x10, 0, 1),
247 PIN_FIELD_BASE(14, 14, 1, 0x70, 0x10, 1, 1),
248 PIN_FIELD_BASE(63, 63, 1, 0x70, 0x10, 2, 1),
250 PIN_FIELD_BASE(75, 75, 4, 0x60, 0x10, 7, 1),
251 PIN_FIELD_BASE(76, 76, 4, 0x60, 0x10, 6, 1),
252 PIN_FIELD_BASE(77, 77, 4, 0x60, 0x10, 1, 1),
253 PIN_FIELD_BASE(78, 78, 4, 0x60, 0x10, 0, 1),
254 PIN_FIELD_BASE(79, 79, 4, 0x60, 0x10, 8, 1),
257 static const struct mtk_pin_field_calc mt7988_pin_pd_range
[] = {
258 PIN_FIELD_BASE(7, 7, 4, 0x40, 0x10, 5, 1),
259 PIN_FIELD_BASE(8, 8, 4, 0x40, 0x10, 4, 1),
260 PIN_FIELD_BASE(9, 9, 4, 0x40, 0x10, 3, 1),
261 PIN_FIELD_BASE(10, 10, 4, 0x40, 0x10, 2, 1),
263 PIN_FIELD_BASE(13, 13, 1, 0x50, 0x10, 0, 1),
264 PIN_FIELD_BASE(14, 14, 1, 0x50, 0x10, 1, 1),
266 PIN_FIELD_BASE(15, 15, 5, 0x40, 0x10, 4, 1),
267 PIN_FIELD_BASE(16, 16, 5, 0x40, 0x10, 5, 1),
268 PIN_FIELD_BASE(17, 17, 5, 0x40, 0x10, 0, 1),
269 PIN_FIELD_BASE(18, 18, 5, 0x40, 0x10, 1, 1),
271 PIN_FIELD_BASE(63, 63, 1, 0x50, 0x10, 2, 1),
272 PIN_FIELD_BASE(71, 71, 5, 0x40, 0x10, 2, 1),
273 PIN_FIELD_BASE(72, 72, 5, 0x40, 0x10, 3, 1),
275 PIN_FIELD_BASE(75, 75, 4, 0x40, 0x10, 7, 1),
276 PIN_FIELD_BASE(76, 76, 4, 0x40, 0x10, 6, 1),
277 PIN_FIELD_BASE(77, 77, 4, 0x40, 0x10, 1, 1),
278 PIN_FIELD_BASE(78, 78, 4, 0x40, 0x10, 0, 1),
279 PIN_FIELD_BASE(79, 79, 4, 0x40, 0x10, 8, 1),
282 static const struct mtk_pin_field_calc mt7988_pin_drv_range
[] = {
283 PIN_FIELD_BASE(0, 0, 5, 0x00, 0x10, 21, 3),
284 PIN_FIELD_BASE(1, 1, 5, 0x00, 0x10, 24, 3),
285 PIN_FIELD_BASE(2, 2, 5, 0x00, 0x10, 15, 3),
286 PIN_FIELD_BASE(3, 3, 5, 0x00, 0x10, 18, 3),
287 PIN_FIELD_BASE(4, 4, 5, 0x00, 0x10, 0, 3),
288 PIN_FIELD_BASE(5, 5, 5, 0x00, 0x10, 9, 3),
289 PIN_FIELD_BASE(6, 6, 5, 0x00, 0x10, 12, 3),
291 PIN_FIELD_BASE(7, 7, 4, 0x00, 0x10, 24, 3),
292 PIN_FIELD_BASE(8, 8, 4, 0x00, 0x10, 28, 3),
293 PIN_FIELD_BASE(9, 9, 4, 0x00, 0x10, 15, 3),
294 PIN_FIELD_BASE(10, 10, 4, 0x00, 0x10, 9, 3),
296 PIN_FIELD_BASE(11, 11, 1, 0x00, 0x10, 0, 3),
297 PIN_FIELD_BASE(12, 12, 1, 0x20, 0x10, 3, 3),
298 PIN_FIELD_BASE(13, 13, 1, 0x00, 0x10, 3, 3),
299 PIN_FIELD_BASE(14, 14, 1, 0x00, 0x10, 6, 3),
301 PIN_FIELD_BASE(19, 19, 4, 0x00, 0x10, 21, 3),
302 PIN_FIELD_BASE(20, 20, 4, 0x00, 0x10, 12, 3),
304 PIN_FIELD_BASE(21, 21, 3, 0x10, 0x10, 21, 3),
305 PIN_FIELD_BASE(22, 22, 3, 0x20, 0x10, 9, 3),
306 PIN_FIELD_BASE(23, 23, 3, 0x20, 0x10, 0, 3),
307 PIN_FIELD_BASE(24, 24, 3, 0x10, 0x10, 27, 3),
308 PIN_FIELD_BASE(25, 25, 3, 0x20, 0x10, 3, 3),
309 PIN_FIELD_BASE(26, 26, 3, 0x20, 0x10, 6, 3),
310 PIN_FIELD_BASE(27, 27, 3, 0x10, 0x10, 24, 3),
311 PIN_FIELD_BASE(28, 28, 3, 0x20, 0x10, 15, 3),
312 PIN_FIELD_BASE(29, 29, 3, 0x20, 0x10, 18, 3),
313 PIN_FIELD_BASE(30, 30, 3, 0x20, 0x10, 21, 3),
314 PIN_FIELD_BASE(31, 31, 3, 0x20, 0x10, 12, 3),
315 PIN_FIELD_BASE(32, 32, 3, 0x20, 0x10, 24, 3),
316 PIN_FIELD_BASE(33, 33, 3, 0x30, 0x10, 6, 3),
317 PIN_FIELD_BASE(34, 34, 3, 0x30, 0x10, 3, 3),
318 PIN_FIELD_BASE(35, 35, 3, 0x20, 0x10, 27, 3),
319 PIN_FIELD_BASE(36, 36, 3, 0x30, 0x10, 0, 3),
320 PIN_FIELD_BASE(37, 37, 3, 0x30, 0x10, 9, 3),
321 PIN_FIELD_BASE(38, 38, 3, 0x10, 0x10, 3, 3),
322 PIN_FIELD_BASE(39, 39, 3, 0x10, 0x10, 0, 3),
323 PIN_FIELD_BASE(40, 40, 3, 0x00, 0x10, 0, 3),
324 PIN_FIELD_BASE(41, 41, 3, 0x00, 0x10, 3, 3),
325 PIN_FIELD_BASE(42, 42, 3, 0x00, 0x10, 27, 3),
326 PIN_FIELD_BASE(43, 43, 3, 0x00, 0x10, 24, 3),
327 PIN_FIELD_BASE(44, 44, 3, 0x00, 0x10, 21, 3),
328 PIN_FIELD_BASE(45, 45, 3, 0x00, 0x10, 18, 3),
329 PIN_FIELD_BASE(46, 46, 3, 0x00, 0x10, 15, 3),
330 PIN_FIELD_BASE(47, 47, 3, 0x00, 0x10, 12, 3),
331 PIN_FIELD_BASE(48, 48, 3, 0x00, 0x10, 9, 3),
332 PIN_FIELD_BASE(49, 49, 3, 0x00, 0x10, 6, 3),
333 PIN_FIELD_BASE(50, 50, 3, 0x10, 0x10, 15, 3),
334 PIN_FIELD_BASE(51, 51, 3, 0x10, 0x10, 6, 3),
335 PIN_FIELD_BASE(52, 52, 3, 0x10, 0x10, 9, 3),
336 PIN_FIELD_BASE(53, 53, 3, 0x10, 0x10, 12, 3),
337 PIN_FIELD_BASE(54, 54, 3, 0x10, 0x10, 18, 3),
339 PIN_FIELD_BASE(55, 55, 1, 0x10, 0x10, 12, 3),
340 PIN_FIELD_BASE(56, 56, 1, 0x10, 0x10, 15, 3),
341 PIN_FIELD_BASE(57, 57, 1, 0x10, 0x10, 9, 3),
342 PIN_FIELD_BASE(58, 58, 1, 0x00, 0x10, 12, 3),
343 PIN_FIELD_BASE(59, 59, 1, 0x00, 0x10, 15, 3),
344 PIN_FIELD_BASE(60, 60, 1, 0x00, 0x10, 18, 3),
345 PIN_FIELD_BASE(61, 61, 1, 0x00, 0x10, 9, 3),
346 PIN_FIELD_BASE(62, 62, 1, 0x00, 0x10, 21, 3),
347 PIN_FIELD_BASE(63, 63, 1, 0x20, 0x10, 0, 3),
348 PIN_FIELD_BASE(64, 64, 1, 0x00, 0x10, 24, 3),
349 PIN_FIELD_BASE(65, 65, 1, 0x00, 0x10, 27, 3),
350 PIN_FIELD_BASE(66, 66, 1, 0x10, 0x10, 0, 3),
351 PIN_FIELD_BASE(67, 67, 1, 0x10, 0x10, 3, 3),
352 PIN_FIELD_BASE(68, 68, 1, 0x10, 0x10, 6, 3),
354 PIN_FIELD_BASE(69, 69, 5, 0x00, 0x10, 3, 3),
355 PIN_FIELD_BASE(70, 70, 5, 0x00, 0x10, 6, 3),
357 PIN_FIELD_BASE(73, 73, 4, 0x10, 0x10, 0, 3),
358 PIN_FIELD_BASE(74, 74, 4, 0x00, 0x10, 3, 3),
359 PIN_FIELD_BASE(75, 75, 4, 0x10, 0x10, 3, 3),
360 PIN_FIELD_BASE(76, 76, 4, 0x00, 0x10, 27, 3),
361 PIN_FIELD_BASE(77, 77, 4, 0x00, 0x10, 6, 3),
362 PIN_FIELD_BASE(78, 78, 4, 0x00, 0x10, 0, 3),
363 PIN_FIELD_BASE(79, 79, 4, 0x10, 0x10, 6, 3),
365 PIN_FIELD_BASE(80, 80, 1, 0x10, 0x10, 24, 3),
366 PIN_FIELD_BASE(81, 81, 1, 0x10, 0x10, 27, 3),
367 PIN_FIELD_BASE(82, 82, 1, 0x10, 0x10, 18, 3),
368 PIN_FIELD_BASE(83, 83, 1, 0x10, 0x10, 21, 3),
371 static const struct mtk_pin_field_calc mt7988_pin_pupd_range
[] = {
372 PIN_FIELD_BASE(0, 0, 5, 0x50, 0x10, 7, 1),
373 PIN_FIELD_BASE(1, 1, 5, 0x50, 0x10, 8, 1),
374 PIN_FIELD_BASE(2, 2, 5, 0x50, 0x10, 5, 1),
375 PIN_FIELD_BASE(3, 3, 5, 0x50, 0x10, 6, 1),
376 PIN_FIELD_BASE(4, 4, 5, 0x50, 0x10, 0, 1),
377 PIN_FIELD_BASE(5, 5, 5, 0x50, 0x10, 3, 1),
378 PIN_FIELD_BASE(6, 6, 5, 0x50, 0x10, 4, 1),
380 PIN_FIELD_BASE(11, 11, 1, 0x60, 0x10, 0, 1),
381 PIN_FIELD_BASE(12, 12, 1, 0x60, 0x10, 18, 1),
383 PIN_FIELD_BASE(19, 19, 4, 0x50, 0x10, 2, 1),
384 PIN_FIELD_BASE(20, 20, 4, 0x50, 0x10, 1, 1),
386 PIN_FIELD_BASE(21, 21, 3, 0x70, 0x10, 17, 1),
387 PIN_FIELD_BASE(22, 22, 3, 0x70, 0x10, 23, 1),
388 PIN_FIELD_BASE(23, 23, 3, 0x70, 0x10, 20, 1),
389 PIN_FIELD_BASE(24, 24, 3, 0x70, 0x10, 19, 1),
390 PIN_FIELD_BASE(25, 25, 3, 0x70, 0x10, 21, 1),
391 PIN_FIELD_BASE(26, 26, 3, 0x70, 0x10, 22, 1),
392 PIN_FIELD_BASE(27, 27, 3, 0x70, 0x10, 18, 1),
393 PIN_FIELD_BASE(28, 28, 3, 0x70, 0x10, 25, 1),
394 PIN_FIELD_BASE(29, 29, 3, 0x70, 0x10, 26, 1),
395 PIN_FIELD_BASE(30, 30, 3, 0x70, 0x10, 27, 1),
396 PIN_FIELD_BASE(31, 31, 3, 0x70, 0x10, 24, 1),
397 PIN_FIELD_BASE(32, 32, 3, 0x70, 0x10, 28, 1),
398 PIN_FIELD_BASE(33, 33, 3, 0x80, 0x10, 0, 1),
399 PIN_FIELD_BASE(34, 34, 3, 0x70, 0x10, 31, 1),
400 PIN_FIELD_BASE(35, 35, 3, 0x70, 0x10, 29, 1),
401 PIN_FIELD_BASE(36, 36, 3, 0x70, 0x10, 30, 1),
402 PIN_FIELD_BASE(37, 37, 3, 0x80, 0x10, 1, 1),
403 PIN_FIELD_BASE(38, 38, 3, 0x70, 0x10, 11, 1),
404 PIN_FIELD_BASE(39, 39, 3, 0x70, 0x10, 10, 1),
405 PIN_FIELD_BASE(40, 40, 3, 0x70, 0x10, 0, 1),
406 PIN_FIELD_BASE(41, 41, 3, 0x70, 0x10, 1, 1),
407 PIN_FIELD_BASE(42, 42, 3, 0x70, 0x10, 9, 1),
408 PIN_FIELD_BASE(43, 43, 3, 0x70, 0x10, 8, 1),
409 PIN_FIELD_BASE(44, 44, 3, 0x70, 0x10, 7, 1),
410 PIN_FIELD_BASE(45, 45, 3, 0x70, 0x10, 6, 1),
411 PIN_FIELD_BASE(46, 46, 3, 0x70, 0x10, 5, 1),
412 PIN_FIELD_BASE(47, 47, 3, 0x70, 0x10, 4, 1),
413 PIN_FIELD_BASE(48, 48, 3, 0x70, 0x10, 3, 1),
414 PIN_FIELD_BASE(49, 49, 3, 0x70, 0x10, 2, 1),
415 PIN_FIELD_BASE(50, 50, 3, 0x70, 0x10, 15, 1),
416 PIN_FIELD_BASE(51, 51, 3, 0x70, 0x10, 12, 1),
417 PIN_FIELD_BASE(52, 52, 3, 0x70, 0x10, 13, 1),
418 PIN_FIELD_BASE(53, 53, 3, 0x70, 0x10, 14, 1),
419 PIN_FIELD_BASE(54, 54, 3, 0x70, 0x10, 16, 1),
421 PIN_FIELD_BASE(55, 55, 1, 0x60, 0x10, 12, 1),
422 PIN_FIELD_BASE(56, 56, 1, 0x60, 0x10, 13, 1),
423 PIN_FIELD_BASE(57, 57, 1, 0x60, 0x10, 11, 1),
424 PIN_FIELD_BASE(58, 58, 1, 0x60, 0x10, 2, 1),
425 PIN_FIELD_BASE(59, 59, 1, 0x60, 0x10, 3, 1),
426 PIN_FIELD_BASE(60, 60, 1, 0x60, 0x10, 4, 1),
427 PIN_FIELD_BASE(61, 61, 1, 0x60, 0x10, 1, 1),
428 PIN_FIELD_BASE(62, 62, 1, 0x60, 0x10, 5, 1),
429 PIN_FIELD_BASE(64, 64, 1, 0x60, 0x10, 6, 1),
430 PIN_FIELD_BASE(65, 65, 1, 0x60, 0x10, 7, 1),
431 PIN_FIELD_BASE(66, 66, 1, 0x60, 0x10, 8, 1),
432 PIN_FIELD_BASE(67, 67, 1, 0x60, 0x10, 9, 1),
433 PIN_FIELD_BASE(68, 68, 1, 0x60, 0x10, 10, 1),
435 PIN_FIELD_BASE(69, 69, 5, 0x50, 0x10, 1, 1),
436 PIN_FIELD_BASE(70, 70, 5, 0x50, 0x10, 2, 1),
438 PIN_FIELD_BASE(73, 73, 4, 0x50, 0x10, 3, 1),
439 PIN_FIELD_BASE(74, 74, 4, 0x50, 0x10, 0, 1),
441 PIN_FIELD_BASE(80, 80, 1, 0x60, 0x10, 16, 1),
442 PIN_FIELD_BASE(81, 81, 1, 0x60, 0x10, 17, 1),
443 PIN_FIELD_BASE(82, 82, 1, 0x60, 0x10, 14, 1),
444 PIN_FIELD_BASE(83, 83, 1, 0x60, 0x10, 15, 1),
447 static const struct mtk_pin_field_calc mt7988_pin_r0_range
[] = {
448 PIN_FIELD_BASE(0, 0, 5, 0x60, 0x10, 7, 1),
449 PIN_FIELD_BASE(1, 1, 5, 0x60, 0x10, 8, 1),
450 PIN_FIELD_BASE(2, 2, 5, 0x60, 0x10, 5, 1),
451 PIN_FIELD_BASE(3, 3, 5, 0x60, 0x10, 6, 1),
452 PIN_FIELD_BASE(4, 4, 5, 0x60, 0x10, 0, 1),
453 PIN_FIELD_BASE(5, 5, 5, 0x60, 0x10, 3, 1),
454 PIN_FIELD_BASE(6, 6, 5, 0x60, 0x10, 4, 1),
456 PIN_FIELD_BASE(11, 11, 1, 0x80, 0x10, 0, 1),
457 PIN_FIELD_BASE(12, 12, 1, 0x80, 0x10, 18, 1),
459 PIN_FIELD_BASE(19, 19, 4, 0x70, 0x10, 2, 1),
460 PIN_FIELD_BASE(20, 20, 4, 0x70, 0x10, 1, 1),
462 PIN_FIELD_BASE(21, 21, 3, 0x90, 0x10, 17, 1),
463 PIN_FIELD_BASE(22, 22, 3, 0x90, 0x10, 23, 1),
464 PIN_FIELD_BASE(23, 23, 3, 0x90, 0x10, 20, 1),
465 PIN_FIELD_BASE(24, 24, 3, 0x90, 0x10, 19, 1),
466 PIN_FIELD_BASE(25, 25, 3, 0x90, 0x10, 21, 1),
467 PIN_FIELD_BASE(26, 26, 3, 0x90, 0x10, 22, 1),
468 PIN_FIELD_BASE(27, 27, 3, 0x90, 0x10, 18, 1),
469 PIN_FIELD_BASE(28, 28, 3, 0x90, 0x10, 25, 1),
470 PIN_FIELD_BASE(29, 29, 3, 0x90, 0x10, 26, 1),
471 PIN_FIELD_BASE(30, 30, 3, 0x90, 0x10, 27, 1),
472 PIN_FIELD_BASE(31, 31, 3, 0x90, 0x10, 24, 1),
473 PIN_FIELD_BASE(32, 32, 3, 0x90, 0x10, 28, 1),
474 PIN_FIELD_BASE(33, 33, 3, 0xa0, 0x10, 0, 1),
475 PIN_FIELD_BASE(34, 34, 3, 0x90, 0x10, 31, 1),
476 PIN_FIELD_BASE(35, 35, 3, 0x90, 0x10, 29, 1),
477 PIN_FIELD_BASE(36, 36, 3, 0x90, 0x10, 30, 1),
478 PIN_FIELD_BASE(37, 37, 3, 0xa0, 0x10, 1, 1),
479 PIN_FIELD_BASE(38, 38, 3, 0x90, 0x10, 11, 1),
480 PIN_FIELD_BASE(39, 39, 3, 0x90, 0x10, 10, 1),
481 PIN_FIELD_BASE(40, 40, 3, 0x90, 0x10, 0, 1),
482 PIN_FIELD_BASE(41, 41, 3, 0x90, 0x10, 1, 1),
483 PIN_FIELD_BASE(42, 42, 3, 0x90, 0x10, 9, 1),
484 PIN_FIELD_BASE(43, 43, 3, 0x90, 0x10, 8, 1),
485 PIN_FIELD_BASE(44, 44, 3, 0x90, 0x10, 7, 1),
486 PIN_FIELD_BASE(45, 45, 3, 0x90, 0x10, 6, 1),
487 PIN_FIELD_BASE(46, 46, 3, 0x90, 0x10, 5, 1),
488 PIN_FIELD_BASE(47, 47, 3, 0x90, 0x10, 4, 1),
489 PIN_FIELD_BASE(48, 48, 3, 0x90, 0x10, 3, 1),
490 PIN_FIELD_BASE(49, 49, 3, 0x90, 0x10, 2, 1),
491 PIN_FIELD_BASE(50, 50, 3, 0x90, 0x10, 15, 1),
492 PIN_FIELD_BASE(51, 51, 3, 0x90, 0x10, 12, 1),
493 PIN_FIELD_BASE(52, 52, 3, 0x90, 0x10, 13, 1),
494 PIN_FIELD_BASE(53, 53, 3, 0x90, 0x10, 14, 1),
495 PIN_FIELD_BASE(54, 54, 3, 0x90, 0x10, 16, 1),
497 PIN_FIELD_BASE(55, 55, 1, 0x80, 0x10, 12, 1),
498 PIN_FIELD_BASE(56, 56, 1, 0x80, 0x10, 13, 1),
499 PIN_FIELD_BASE(57, 57, 1, 0x80, 0x10, 11, 1),
500 PIN_FIELD_BASE(58, 58, 1, 0x80, 0x10, 2, 1),
501 PIN_FIELD_BASE(59, 59, 1, 0x80, 0x10, 3, 1),
502 PIN_FIELD_BASE(60, 60, 1, 0x80, 0x10, 4, 1),
503 PIN_FIELD_BASE(61, 61, 1, 0x80, 0x10, 1, 1),
504 PIN_FIELD_BASE(62, 62, 1, 0x80, 0x10, 5, 1),
505 PIN_FIELD_BASE(64, 64, 1, 0x80, 0x10, 6, 1),
506 PIN_FIELD_BASE(65, 65, 1, 0x80, 0x10, 7, 1),
507 PIN_FIELD_BASE(66, 66, 1, 0x80, 0x10, 8, 1),
508 PIN_FIELD_BASE(67, 67, 1, 0x80, 0x10, 9, 1),
509 PIN_FIELD_BASE(68, 68, 1, 0x80, 0x10, 10, 1),
511 PIN_FIELD_BASE(69, 69, 5, 0x60, 0x10, 1, 1),
512 PIN_FIELD_BASE(70, 70, 5, 0x60, 0x10, 2, 1),
514 PIN_FIELD_BASE(73, 73, 4, 0x70, 0x10, 3, 1),
515 PIN_FIELD_BASE(74, 74, 4, 0x70, 0x10, 0, 1),
517 PIN_FIELD_BASE(80, 80, 1, 0x80, 0x10, 16, 1),
518 PIN_FIELD_BASE(81, 81, 1, 0x80, 0x10, 17, 1),
519 PIN_FIELD_BASE(82, 82, 1, 0x80, 0x10, 14, 1),
520 PIN_FIELD_BASE(83, 83, 1, 0x80, 0x10, 15, 1),
523 static const struct mtk_pin_field_calc mt7988_pin_r1_range
[] = {
524 PIN_FIELD_BASE(0, 0, 5, 0x70, 0x10, 7, 1),
525 PIN_FIELD_BASE(1, 1, 5, 0x70, 0x10, 8, 1),
526 PIN_FIELD_BASE(2, 2, 5, 0x70, 0x10, 5, 1),
527 PIN_FIELD_BASE(3, 3, 5, 0x70, 0x10, 6, 1),
528 PIN_FIELD_BASE(4, 4, 5, 0x70, 0x10, 0, 1),
529 PIN_FIELD_BASE(5, 5, 5, 0x70, 0x10, 3, 1),
530 PIN_FIELD_BASE(6, 6, 5, 0x70, 0x10, 4, 1),
532 PIN_FIELD_BASE(11, 11, 1, 0x90, 0x10, 0, 1),
533 PIN_FIELD_BASE(12, 12, 1, 0x90, 0x10, 18, 1),
535 PIN_FIELD_BASE(19, 19, 4, 0x80, 0x10, 2, 1),
536 PIN_FIELD_BASE(20, 20, 4, 0x80, 0x10, 1, 1),
538 PIN_FIELD_BASE(21, 21, 3, 0xb0, 0x10, 17, 1),
539 PIN_FIELD_BASE(22, 22, 3, 0xb0, 0x10, 23, 1),
540 PIN_FIELD_BASE(23, 23, 3, 0xb0, 0x10, 20, 1),
541 PIN_FIELD_BASE(24, 24, 3, 0xb0, 0x10, 19, 1),
542 PIN_FIELD_BASE(25, 25, 3, 0xb0, 0x10, 21, 1),
543 PIN_FIELD_BASE(26, 26, 3, 0xb0, 0x10, 22, 1),
544 PIN_FIELD_BASE(27, 27, 3, 0xb0, 0x10, 18, 1),
545 PIN_FIELD_BASE(28, 28, 3, 0xb0, 0x10, 25, 1),
546 PIN_FIELD_BASE(29, 29, 3, 0xb0, 0x10, 26, 1),
547 PIN_FIELD_BASE(30, 30, 3, 0xb0, 0x10, 27, 1),
548 PIN_FIELD_BASE(31, 31, 3, 0xb0, 0x10, 24, 1),
549 PIN_FIELD_BASE(32, 32, 3, 0xb0, 0x10, 28, 1),
550 PIN_FIELD_BASE(33, 33, 3, 0xc0, 0x10, 0, 1),
551 PIN_FIELD_BASE(34, 34, 3, 0xb0, 0x10, 31, 1),
552 PIN_FIELD_BASE(35, 35, 3, 0xb0, 0x10, 29, 1),
553 PIN_FIELD_BASE(36, 36, 3, 0xb0, 0x10, 30, 1),
554 PIN_FIELD_BASE(37, 37, 3, 0xc0, 0x10, 1, 1),
555 PIN_FIELD_BASE(38, 38, 3, 0xb0, 0x10, 11, 1),
556 PIN_FIELD_BASE(39, 39, 3, 0xb0, 0x10, 10, 1),
557 PIN_FIELD_BASE(40, 40, 3, 0xb0, 0x10, 0, 1),
558 PIN_FIELD_BASE(41, 41, 3, 0xb0, 0x10, 1, 1),
559 PIN_FIELD_BASE(42, 42, 3, 0xb0, 0x10, 9, 1),
560 PIN_FIELD_BASE(43, 43, 3, 0xb0, 0x10, 8, 1),
561 PIN_FIELD_BASE(44, 44, 3, 0xb0, 0x10, 7, 1),
562 PIN_FIELD_BASE(45, 45, 3, 0xb0, 0x10, 6, 1),
563 PIN_FIELD_BASE(46, 46, 3, 0xb0, 0x10, 5, 1),
564 PIN_FIELD_BASE(47, 47, 3, 0xb0, 0x10, 4, 1),
565 PIN_FIELD_BASE(48, 48, 3, 0xb0, 0x10, 3, 1),
566 PIN_FIELD_BASE(49, 49, 3, 0xb0, 0x10, 2, 1),
567 PIN_FIELD_BASE(50, 50, 3, 0xb0, 0x10, 15, 1),
568 PIN_FIELD_BASE(51, 51, 3, 0xb0, 0x10, 12, 1),
569 PIN_FIELD_BASE(52, 52, 3, 0xb0, 0x10, 13, 1),
570 PIN_FIELD_BASE(53, 53, 3, 0xb0, 0x10, 14, 1),
571 PIN_FIELD_BASE(54, 54, 3, 0xb0, 0x10, 16, 1),
573 PIN_FIELD_BASE(55, 55, 1, 0x90, 0x10, 12, 1),
574 PIN_FIELD_BASE(56, 56, 1, 0x90, 0x10, 13, 1),
575 PIN_FIELD_BASE(57, 57, 1, 0x90, 0x10, 11, 1),
576 PIN_FIELD_BASE(58, 58, 1, 0x90, 0x10, 2, 1),
577 PIN_FIELD_BASE(59, 59, 1, 0x90, 0x10, 3, 1),
578 PIN_FIELD_BASE(60, 60, 1, 0x90, 0x10, 4, 1),
579 PIN_FIELD_BASE(61, 61, 1, 0x90, 0x10, 1, 1),
580 PIN_FIELD_BASE(62, 62, 1, 0x90, 0x10, 5, 1),
581 PIN_FIELD_BASE(64, 64, 1, 0x90, 0x10, 6, 1),
582 PIN_FIELD_BASE(65, 65, 1, 0x90, 0x10, 7, 1),
583 PIN_FIELD_BASE(66, 66, 1, 0x90, 0x10, 8, 1),
584 PIN_FIELD_BASE(67, 67, 1, 0x90, 0x10, 9, 1),
585 PIN_FIELD_BASE(68, 68, 1, 0x90, 0x10, 10, 1),
587 PIN_FIELD_BASE(69, 69, 5, 0x70, 0x10, 1, 1),
588 PIN_FIELD_BASE(70, 70, 5, 0x70, 0x10, 2, 1),
590 PIN_FIELD_BASE(73, 73, 4, 0x80, 0x10, 3, 1),
591 PIN_FIELD_BASE(74, 74, 4, 0x80, 0x10, 0, 1),
593 PIN_FIELD_BASE(80, 80, 1, 0x90, 0x10, 16, 1),
594 PIN_FIELD_BASE(81, 81, 1, 0x90, 0x10, 17, 1),
595 PIN_FIELD_BASE(82, 82, 1, 0x90, 0x10, 14, 1),
596 PIN_FIELD_BASE(83, 83, 1, 0x90, 0x10, 15, 1),
599 static const struct mtk_pin_reg_calc mt7988_reg_cals
[] = {
600 [PINCTRL_PIN_REG_MODE
] = MTK_RANGE(mt7988_pin_mode_range
),
601 [PINCTRL_PIN_REG_DIR
] = MTK_RANGE(mt7988_pin_dir_range
),
602 [PINCTRL_PIN_REG_DI
] = MTK_RANGE(mt7988_pin_di_range
),
603 [PINCTRL_PIN_REG_DO
] = MTK_RANGE(mt7988_pin_do_range
),
604 [PINCTRL_PIN_REG_SMT
] = MTK_RANGE(mt7988_pin_smt_range
),
605 [PINCTRL_PIN_REG_IES
] = MTK_RANGE(mt7988_pin_ies_range
),
606 [PINCTRL_PIN_REG_PU
] = MTK_RANGE(mt7988_pin_pu_range
),
607 [PINCTRL_PIN_REG_PD
] = MTK_RANGE(mt7988_pin_pd_range
),
608 [PINCTRL_PIN_REG_DRV
] = MTK_RANGE(mt7988_pin_drv_range
),
609 [PINCTRL_PIN_REG_PUPD
] = MTK_RANGE(mt7988_pin_pupd_range
),
610 [PINCTRL_PIN_REG_R0
] = MTK_RANGE(mt7988_pin_r0_range
),
611 [PINCTRL_PIN_REG_R1
] = MTK_RANGE(mt7988_pin_r1_range
),
614 static const struct mtk_pin_desc mt7988_pins
[] = {
615 MT7988_PIN(0, "UART2_RXD"),
616 MT7988_PIN(1, "UART2_TXD"),
617 MT7988_PIN(2, "UART2_CTS"),
618 MT7988_PIN(3, "UART2_RTS"),
619 MT7988_PIN(4, "GPIO_A"),
620 MT7988_PIN(5, "SMI_0_MDC"),
621 MT7988_PIN(6, "SMI_0_MDIO"),
622 MT7988_PIN(7, "PCIE30_2L_0_WAKE_N"),
623 MT7988_PIN(8, "PCIE30_2L_0_CLKREQ_N"),
624 MT7988_PIN(9, "PCIE30_1L_1_WAKE_N"),
625 MT7988_PIN(10, "PCIE30_1L_1_CLKREQ_N"),
626 MT7988_PIN(11, "GPIO_P"),
627 MT7988_PIN(12, "WATCHDOG"),
628 MT7988_PIN(13, "GPIO_RESET"),
629 MT7988_PIN(14, "GPIO_WPS"),
630 MT7988_PIN(15, "PMIC_I2C_SCL"),
631 MT7988_PIN(16, "PMIC_I2C_SDA"),
632 MT7988_PIN(17, "I2C_1_SCL"),
633 MT7988_PIN(18, "I2C_1_SDA"),
634 MT7988_PIN(19, "PCIE30_2L_0_PRESET_N"),
635 MT7988_PIN(20, "PCIE30_1L_1_PRESET_N"),
636 MT7988_PIN(21, "PWMD1"),
637 MT7988_PIN(22, "SPI0_WP"),
638 MT7988_PIN(23, "SPI0_HOLD"),
639 MT7988_PIN(24, "SPI0_CSB"),
640 MT7988_PIN(25, "SPI0_MISO"),
641 MT7988_PIN(26, "SPI0_MOSI"),
642 MT7988_PIN(27, "SPI0_CLK"),
643 MT7988_PIN(28, "SPI1_CSB"),
644 MT7988_PIN(29, "SPI1_MISO"),
645 MT7988_PIN(30, "SPI1_MOSI"),
646 MT7988_PIN(31, "SPI1_CLK"),
647 MT7988_PIN(32, "SPI2_CLK"),
648 MT7988_PIN(33, "SPI2_MOSI"),
649 MT7988_PIN(34, "SPI2_MISO"),
650 MT7988_PIN(35, "SPI2_CSB"),
651 MT7988_PIN(36, "SPI2_HOLD"),
652 MT7988_PIN(37, "SPI2_WP"),
653 MT7988_PIN(38, "EMMC_RSTB"),
654 MT7988_PIN(39, "EMMC_DSL"),
655 MT7988_PIN(40, "EMMC_CK"),
656 MT7988_PIN(41, "EMMC_CMD"),
657 MT7988_PIN(42, "EMMC_DATA_7"),
658 MT7988_PIN(43, "EMMC_DATA_6"),
659 MT7988_PIN(44, "EMMC_DATA_5"),
660 MT7988_PIN(45, "EMMC_DATA_4"),
661 MT7988_PIN(46, "EMMC_DATA_3"),
662 MT7988_PIN(47, "EMMC_DATA_2"),
663 MT7988_PIN(48, "EMMC_DATA_1"),
664 MT7988_PIN(49, "EMMC_DATA_0"),
665 MT7988_PIN(50, "PCM_FS_I2S_LRCK"),
666 MT7988_PIN(51, "PCM_CLK_I2S_BCLK"),
667 MT7988_PIN(52, "PCM_DRX_I2S_DIN"),
668 MT7988_PIN(53, "PCM_DTX_I2S_DOUT"),
669 MT7988_PIN(54, "PCM_MCK_I2S_MCLK"),
670 MT7988_PIN(55, "UART0_RXD"),
671 MT7988_PIN(56, "UART0_TXD"),
672 MT7988_PIN(57, "PWMD0"),
673 MT7988_PIN(58, "JTAG_JTDI"),
674 MT7988_PIN(59, "JTAG_JTDO"),
675 MT7988_PIN(60, "JTAG_JTMS"),
676 MT7988_PIN(61, "JTAG_JTCLK"),
677 MT7988_PIN(62, "JTAG_JTRST_N"),
678 MT7988_PIN(63, "USB_DRV_VBUS_P1"),
679 MT7988_PIN(64, "LED_A"),
680 MT7988_PIN(65, "LED_B"),
681 MT7988_PIN(66, "LED_C"),
682 MT7988_PIN(67, "LED_D"),
683 MT7988_PIN(68, "LED_E"),
684 MT7988_PIN(69, "GPIO_B"),
685 MT7988_PIN(70, "GPIO_C"),
686 MT7988_PIN(71, "I2C_2_SCL"),
687 MT7988_PIN(72, "I2C_2_SDA"),
688 MT7988_PIN(73, "PCIE30_2L_1_PRESET_N"),
689 MT7988_PIN(74, "PCIE30_1L_0_PRESET_N"),
690 MT7988_PIN(75, "PCIE30_2L_1_WAKE_N"),
691 MT7988_PIN(76, "PCIE30_2L_1_CLKREQ_N"),
692 MT7988_PIN(77, "PCIE30_1L_0_WAKE_N"),
693 MT7988_PIN(78, "PCIE30_1L_0_CLKREQ_N"),
694 MT7988_PIN(79, "USB_DRV_VBUS_P0"),
695 MT7988_PIN(80, "UART1_RXD"),
696 MT7988_PIN(81, "UART1_TXD"),
697 MT7988_PIN(82, "UART1_CTS"),
698 MT7988_PIN(83, "UART1_RTS"),
702 static int mt7988_tops_jtag0_0_pins
[] = { 0, 1, 2, 3, 4 };
703 static int mt7988_tops_jtag0_0_funcs
[] = { 2, 2, 2, 2, 2 };
705 static int mt7988_wo0_jtag_pins
[] = { 50, 51, 52, 53, 54 };
706 static int mt7988_wo0_jtag_funcs
[] = { 3, 3, 3, 3, 3 };
708 static int mt7988_wo1_jtag_pins
[] = { 50, 51, 52, 53, 54 };
709 static int mt7988_wo1_jtag_funcs
[] = { 4, 4, 4, 4, 4 };
711 static int mt7988_wo2_jtag_pins
[] = { 50, 51, 52, 53, 54 };
712 static int mt7988_wo2_jtag_funcs
[] = { 5, 5, 5, 5, 5 };
714 static int mt7988_jtag_pins
[] = { 58, 59, 60, 61, 62 };
715 static int mt7988_jtag_funcs
[] = { 1, 1, 1, 1, 1 };
717 static int mt7988_tops_jtag0_1_pins
[] = { 58, 59, 60, 61, 62 };
718 static int mt7988_tops_jtag0_1_funcs
[] = { 4, 4, 4, 4, 4 };
721 static int mt7988_int_usxgmii_pins
[] = { 2, 3 };
722 static int mt7988_int_usxgmii_funcs
[] = { 3, 3 };
725 static int mt7988_pwm0_pins
[] = { 57 };
726 static int mt7988_pwm0_funcs
[] = { 1 };
728 static int mt7988_pwm1_pins
[] = { 21 };
729 static int mt7988_pwm1_funcs
[] = { 1 };
731 static int mt7988_pwm2_pins
[] = { 80 };
732 static int mt7988_pwm2_funcs
[] = { 2 };
734 static int mt7988_pwm3_pins
[] = { 81 };
735 static int mt7988_pwm3_funcs
[] = { 2 };
737 static int mt7988_pwm4_pins
[] = { 82 };
738 static int mt7988_pwm4_funcs
[] = { 2 };
740 static int mt7988_pwm5_pins
[] = { 83 };
741 static int mt7988_pwm5_funcs
[] = { 2 };
743 static int mt7988_pwm6_pins
[] = { 69 };
744 static int mt7988_pwm6_funcs
[] = { 3 };
746 static int mt7988_pwm7_pins
[] = { 70 };
747 static int mt7988_pwm7_funcs
[] = { 3 };
750 static int mt7988_dfd_pins
[] = { 0, 1, 2, 3, 4 };
751 static int mt7988_dfd_funcs
[] = { 4, 4, 4, 4, 4 };
754 static int mt7988_xfi_phy0_i2c0_pins
[] = { 0, 1 };
755 static int mt7988_xfi_phy0_i2c0_funcs
[] = { 5, 5 };
757 static int mt7988_xfi_phy1_i2c0_pins
[] = { 0, 1 };
758 static int mt7988_xfi_phy1_i2c0_funcs
[] = { 6, 6 };
760 static int mt7988_xfi_phy_pll_i2c0_pins
[] = { 3, 4 };
761 static int mt7988_xfi_phy_pll_i2c0_funcs
[] = { 5, 5 };
763 static int mt7988_xfi_phy_pll_i2c1_pins
[] = { 3, 4 };
764 static int mt7988_xfi_phy_pll_i2c1_funcs
[] = { 6, 6 };
766 static int mt7988_i2c0_0_pins
[] = { 5, 6 };
767 static int mt7988_i2c0_0_funcs
[] = { 2, 2 };
769 static int mt7988_i2c1_sfp_pins
[] = { 5, 6 };
770 static int mt7988_i2c1_sfp_funcs
[] = { 4, 4 };
772 static int mt7988_xfi_pextp_phy0_i2c_pins
[] = { 5, 6 };
773 static int mt7988_xfi_pextp_phy0_i2c_funcs
[] = { 5, 5 };
775 static int mt7988_xfi_pextp_phy1_i2c_pins
[] = { 5, 6 };
776 static int mt7988_xfi_pextp_phy1_i2c_funcs
[] = { 6, 6 };
778 static int mt7988_i2c0_1_pins
[] = { 15, 16 };
779 static int mt7988_i2c0_1_funcs
[] = { 1, 1 };
781 static int mt7988_u30_phy_i2c0_pins
[] = { 15, 16 };
782 static int mt7988_u30_phy_i2c0_funcs
[] = { 2, 2 };
784 static int mt7988_u32_phy_i2c0_pins
[] = { 15, 16 };
785 static int mt7988_u32_phy_i2c0_funcs
[] = { 3, 3 };
787 static int mt7988_xfi_phy0_i2c1_pins
[] = { 15, 16 };
788 static int mt7988_xfi_phy0_i2c1_funcs
[] = { 5, 5 };
790 static int mt7988_xfi_phy1_i2c1_pins
[] = { 15, 16 };
791 static int mt7988_xfi_phy1_i2c1_funcs
[] = { 6, 6 };
793 static int mt7988_xfi_phy_pll_i2c2_pins
[] = { 15, 16 };
794 static int mt7988_xfi_phy_pll_i2c2_funcs
[] = { 7, 7 };
796 static int mt7988_i2c1_0_pins
[] = { 17, 18 };
797 static int mt7988_i2c1_0_funcs
[] = { 1, 1 };
799 static int mt7988_u30_phy_i2c1_pins
[] = { 17, 18 };
800 static int mt7988_u30_phy_i2c1_funcs
[] = { 2, 2 };
802 static int mt7988_u32_phy_i2c1_pins
[] = { 17, 18 };
803 static int mt7988_u32_phy_i2c1_funcs
[] = { 3, 3 };
805 static int mt7988_xfi_phy_pll_i2c3_pins
[] = { 17, 18 };
806 static int mt7988_xfi_phy_pll_i2c3_funcs
[] = { 4, 4 };
808 static int mt7988_sgmii0_i2c_pins
[] = { 17, 18 };
809 static int mt7988_sgmii0_i2c_funcs
[] = { 5, 5 };
811 static int mt7988_sgmii1_i2c_pins
[] = { 17, 18 };
812 static int mt7988_sgmii1_i2c_funcs
[] = { 6, 6 };
814 static int mt7988_i2c1_2_pins
[] = { 69, 70 };
815 static int mt7988_i2c1_2_funcs
[] = { 2, 2 };
817 static int mt7988_i2c2_0_pins
[] = { 69, 70 };
818 static int mt7988_i2c2_0_funcs
[] = { 4, 4 };
820 static int mt7988_i2c2_1_pins
[] = { 71, 72 };
821 static int mt7988_i2c2_1_funcs
[] = { 1, 1 };
824 static int mt7988_mdc_mdio0_pins
[] = { 5, 6 };
825 static int mt7988_mdc_mdio0_funcs
[] = { 1, 1 };
827 static int mt7988_2p5g_ext_mdio_pins
[] = { 28, 29 };
828 static int mt7988_2p5g_ext_mdio_funcs
[] = { 6, 6 };
830 static int mt7988_gbe_ext_mdio_pins
[] = { 30, 31 };
831 static int mt7988_gbe_ext_mdio_funcs
[] = { 6, 6 };
833 static int mt7988_mdc_mdio1_pins
[] = { 69, 70 };
834 static int mt7988_mdc_mdio1_funcs
[] = { 1, 1 };
837 static int mt7988_pcie_wake_n0_0_pins
[] = { 7 };
838 static int mt7988_pcie_wake_n0_0_funcs
[] = { 1 };
840 static int mt7988_pcie_clk_req_n0_0_pins
[] = { 8 };
841 static int mt7988_pcie_clk_req_n0_0_funcs
[] = { 1 };
843 static int mt7988_pcie_wake_n3_0_pins
[] = { 9 };
844 static int mt7988_pcie_wake_n3_0_funcs
[] = { 1 };
846 static int mt7988_pcie_clk_req_n3_pins
[] = { 10 };
847 static int mt7988_pcie_clk_req_n3_funcs
[] = { 1 };
849 static int mt7988_pcie_clk_req_n0_1_pins
[] = { 10 };
850 static int mt7988_pcie_clk_req_n0_1_funcs
[] = { 2 };
852 static int mt7988_pcie_p0_phy_i2c_pins
[] = { 7, 8 };
853 static int mt7988_pcie_p0_phy_i2c_funcs
[] = { 3, 3 };
855 static int mt7988_pcie_p1_phy_i2c_pins
[] = { 7, 8 };
856 static int mt7988_pcie_p1_phy_i2c_funcs
[] = { 4, 4 };
858 static int mt7988_pcie_p3_phy_i2c_pins
[] = { 9, 10 };
859 static int mt7988_pcie_p3_phy_i2c_funcs
[] = { 4, 4 };
861 static int mt7988_pcie_p2_phy_i2c_pins
[] = { 7, 8 };
862 static int mt7988_pcie_p2_phy_i2c_funcs
[] = { 5, 5 };
864 static int mt7988_ckm_phy_i2c_pins
[] = { 9, 10 };
865 static int mt7988_ckm_phy_i2c_funcs
[] = { 5, 5 };
867 static int mt7988_pcie_wake_n0_1_pins
[] = { 13 };
868 static int mt7988_pcie_wake_n0_1_funcs
[] = { 2 };
870 static int mt7988_pcie_wake_n3_1_pins
[] = { 14 };
871 static int mt7988_pcie_wake_n3_1_funcs
[] = { 2 };
873 static int mt7988_pcie_2l_0_pereset_pins
[] = { 19 };
874 static int mt7988_pcie_2l_0_pereset_funcs
[] = { 1 };
876 static int mt7988_pcie_1l_1_pereset_pins
[] = { 20 };
877 static int mt7988_pcie_1l_1_pereset_funcs
[] = { 1 };
879 static int mt7988_pcie_clk_req_n2_1_pins
[] = { 63 };
880 static int mt7988_pcie_clk_req_n2_1_funcs
[] = { 2 };
882 static int mt7988_pcie_2l_1_pereset_pins
[] = { 73 };
883 static int mt7988_pcie_2l_1_pereset_funcs
[] = { 1 };
885 static int mt7988_pcie_1l_0_pereset_pins
[] = { 74 };
886 static int mt7988_pcie_1l_0_pereset_funcs
[] = { 1 };
888 static int mt7988_pcie_wake_n1_0_pins
[] = { 75 };
889 static int mt7988_pcie_wake_n1_0_funcs
[] = { 1 };
891 static int mt7988_pcie_clk_req_n1_pins
[] = { 76 };
892 static int mt7988_pcie_clk_req_n1_funcs
[] = { 1 };
894 static int mt7988_pcie_wake_n2_0_pins
[] = { 77 };
895 static int mt7988_pcie_wake_n2_0_funcs
[] = { 1 };
897 static int mt7988_pcie_clk_req_n2_0_pins
[] = { 78 };
898 static int mt7988_pcie_clk_req_n2_0_funcs
[] = { 1 };
900 static int mt7988_pcie_wake_n2_1_pins
[] = { 79 };
901 static int mt7988_pcie_wake_n2_1_funcs
[] = { 2 };
904 static int mt7988_pmic_pins
[] = { 11 };
905 static int mt7988_pmic_funcs
[] = { 1 };
908 static int mt7988_watchdog_pins
[] = { 12 };
909 static int mt7988_watchdog_funcs
[] = { 1 };
912 static int mt7988_spi0_wp_hold_pins
[] = { 22, 23 };
913 static int mt7988_spi0_wp_hold_funcs
[] = { 1, 1 };
915 static int mt7988_spi0_pins
[] = { 24, 25, 26, 27 };
916 static int mt7988_spi0_funcs
[] = { 1, 1, 1, 1 };
918 static int mt7988_spi1_pins
[] = { 28, 29, 30, 31 };
919 static int mt7988_spi1_funcs
[] = { 1, 1, 1, 1 };
921 static int mt7988_spi2_pins
[] = { 32, 33, 34, 35 };
922 static int mt7988_spi2_funcs
[] = { 1, 1, 1, 1 };
924 static int mt7988_spi2_wp_hold_pins
[] = { 36, 37 };
925 static int mt7988_spi2_wp_hold_funcs
[] = { 1, 1 };
928 static int mt7988_snfi_pins
[] = { 22, 23, 24, 25, 26, 27 };
929 static int mt7988_snfi_funcs
[] = { 2, 2, 2, 2, 2, 2 };
931 static int mt7988_emmc_45_pins
[] = {
932 21, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37
934 static int mt7988_emmc_45_funcs
[] = { 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 };
936 static int mt7988_sdcard_pins
[] = { 32, 33, 34, 35, 36, 37 };
937 static int mt7988_sdcard_funcs
[] = { 5, 5, 5, 5, 5, 5 };
939 static int mt7988_emmc_51_pins
[] = { 38, 39, 40, 41, 42, 43,
940 44, 45, 46, 47, 48, 49 };
941 static int mt7988_emmc_51_funcs
[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
944 static int mt7988_uart2_pins
[] = { 0, 1, 2, 3 };
945 static int mt7988_uart2_funcs
[] = { 1, 1, 1, 1 };
947 static int mt7988_tops_uart0_0_pins
[] = { 22, 23 };
948 static int mt7988_tops_uart0_0_funcs
[] = { 3, 3 };
950 static int mt7988_uart2_0_pins
[] = { 28, 29, 30, 31 };
951 static int mt7988_uart2_0_funcs
[] = { 2, 2, 2, 2 };
953 static int mt7988_uart1_0_pins
[] = { 32, 33, 34, 35 };
954 static int mt7988_uart1_0_funcs
[] = { 2, 2, 2, 2 };
956 static int mt7988_uart2_1_pins
[] = { 32, 33, 34, 35 };
957 static int mt7988_uart2_1_funcs
[] = { 3, 3, 3, 3 };
959 static int mt7988_net_wo0_uart_txd_0_pins
[] = { 28 };
960 static int mt7988_net_wo0_uart_txd_0_funcs
[] = { 3 };
962 static int mt7988_net_wo1_uart_txd_0_pins
[] = { 29 };
963 static int mt7988_net_wo1_uart_txd_0_funcs
[] = { 3 };
965 static int mt7988_net_wo2_uart_txd_0_pins
[] = { 30 };
966 static int mt7988_net_wo2_uart_txd_0_funcs
[] = { 3 };
968 static int mt7988_tops_uart1_0_pins
[] = { 28, 29 };
969 static int mt7988_tops_uart1_0_funcs
[] = { 4, 4 };
971 static int mt7988_tops_uart0_1_pins
[] = { 30, 31 };
972 static int mt7988_tops_uart0_1_funcs
[] = { 4, 4 };
974 static int mt7988_tops_uart1_1_pins
[] = { 36, 37 };
975 static int mt7988_tops_uart1_1_funcs
[] = { 3, 3 };
977 static int mt7988_uart0_pins
[] = { 55, 56 };
978 static int mt7988_uart0_funcs
[] = { 1, 1 };
980 static int mt7988_tops_uart0_2_pins
[] = { 55, 56 };
981 static int mt7988_tops_uart0_2_funcs
[] = { 2, 2 };
983 static int mt7988_uart2_2_pins
[] = { 50, 51, 52, 53 };
984 static int mt7988_uart2_2_funcs
[] = { 2, 2, 2, 2 };
986 static int mt7988_uart1_1_pins
[] = { 58, 59, 60, 61 };
987 static int mt7988_uart1_1_funcs
[] = { 2, 2, 2, 2 };
989 static int mt7988_uart2_3_pins
[] = { 58, 59, 60, 61 };
990 static int mt7988_uart2_3_funcs
[] = { 3, 3, 3, 3 };
992 static int mt7988_uart1_2_pins
[] = { 80, 81, 82, 83 };
993 static int mt7988_uart1_2_funcs
[] = { 1, 1, 1, 1 };
995 static int mt7988_tops_uart1_2_pins
[] = { 80, 81 };
996 static int mt7988_tops_uart1_2_funcs
[] = {
1001 static int mt7988_net_wo0_uart_txd_1_pins
[] = { 80 };
1002 static int mt7988_net_wo0_uart_txd_1_funcs
[] = { 3 };
1004 static int mt7988_net_wo1_uart_txd_1_pins
[] = { 81 };
1005 static int mt7988_net_wo1_uart_txd_1_funcs
[] = { 3 };
1007 static int mt7988_net_wo2_uart_txd_1_pins
[] = { 82 };
1008 static int mt7988_net_wo2_uart_txd_1_funcs
[] = { 3 };
1011 static int mt7988_udi_pins
[] = { 32, 33, 34, 35, 36 };
1012 static int mt7988_udi_funcs
[] = { 4, 4, 4, 4, 4 };
1015 static int mt7988_i2s_pins
[] = { 50, 51, 52, 53, 54 };
1016 static int mt7988_i2s_funcs
[] = { 1, 1, 1, 1, 1 };
1019 static int mt7988_pcm_pins
[] = { 50, 51, 52, 53 };
1020 static int mt7988_pcm_funcs
[] = { 1, 1, 1, 1 };
1023 static int mt7988_gbe0_led1_pins
[] = { 58 };
1024 static int mt7988_gbe0_led1_funcs
[] = { 6 };
1025 static int mt7988_gbe1_led1_pins
[] = { 59 };
1026 static int mt7988_gbe1_led1_funcs
[] = { 6 };
1027 static int mt7988_gbe2_led1_pins
[] = { 60 };
1028 static int mt7988_gbe2_led1_funcs
[] = { 6 };
1029 static int mt7988_gbe3_led1_pins
[] = { 61 };
1030 static int mt7988_gbe3_led1_funcs
[] = { 6 };
1032 static int mt7988_2p5gbe_led1_pins
[] = { 62 };
1033 static int mt7988_2p5gbe_led1_funcs
[] = { 6 };
1035 static int mt7988_gbe0_led0_pins
[] = { 64 };
1036 static int mt7988_gbe0_led0_funcs
[] = { 1 };
1037 static int mt7988_gbe1_led0_pins
[] = { 65 };
1038 static int mt7988_gbe1_led0_funcs
[] = { 1 };
1039 static int mt7988_gbe2_led0_pins
[] = { 66 };
1040 static int mt7988_gbe2_led0_funcs
[] = { 1 };
1041 static int mt7988_gbe3_led0_pins
[] = { 67 };
1042 static int mt7988_gbe3_led0_funcs
[] = { 1 };
1044 static int mt7988_2p5gbe_led0_pins
[] = { 68 };
1045 static int mt7988_2p5gbe_led0_funcs
[] = { 1 };
1048 static int mt7988_drv_vbus_p1_pins
[] = { 63 };
1049 static int mt7988_drv_vbus_p1_funcs
[] = { 1 };
1051 static int mt7988_drv_vbus_pins
[] = { 79 };
1052 static int mt7988_drv_vbus_funcs
[] = { 1 };
1054 static const struct group_desc mt7988_groups
[] = {
1055 /* @GPIO(0,1,2,3): uart2 */
1056 PINCTRL_PIN_GROUP("uart2", mt7988_uart2
),
1057 /* @GPIO(0,1,2,3,4): tops_jtag0_0 */
1058 PINCTRL_PIN_GROUP("tops_jtag0_0", mt7988_tops_jtag0_0
),
1059 /* @GPIO(2,3): int_usxgmii */
1060 PINCTRL_PIN_GROUP("int_usxgmii", mt7988_int_usxgmii
),
1061 /* @GPIO(0,1,2,3,4): dfd */
1062 PINCTRL_PIN_GROUP("dfd", mt7988_dfd
),
1063 /* @GPIO(0,1): xfi_phy0_i2c0 */
1064 PINCTRL_PIN_GROUP("xfi_phy0_i2c0", mt7988_xfi_phy0_i2c0
),
1065 /* @GPIO(0,1): xfi_phy1_i2c0 */
1066 PINCTRL_PIN_GROUP("xfi_phy1_i2c0", mt7988_xfi_phy1_i2c0
),
1067 /* @GPIO(3,4): xfi_phy_pll_i2c0 */
1068 PINCTRL_PIN_GROUP("xfi_phy_pll_i2c0", mt7988_xfi_phy_pll_i2c0
),
1069 /* @GPIO(3,4): xfi_phy_pll_i2c1 */
1070 PINCTRL_PIN_GROUP("xfi_phy_pll_i2c1", mt7988_xfi_phy_pll_i2c1
),
1071 /* @GPIO(5,6) i2c0_0 */
1072 PINCTRL_PIN_GROUP("i2c0_0", mt7988_i2c0_0
),
1073 /* @GPIO(5,6) i2c1_sfp */
1074 PINCTRL_PIN_GROUP("i2c1_sfp", mt7988_i2c1_sfp
),
1075 /* @GPIO(5,6) xfi_pextp_phy0_i2c */
1076 PINCTRL_PIN_GROUP("xfi_pextp_phy0_i2c", mt7988_xfi_pextp_phy0_i2c
),
1077 /* @GPIO(5,6) xfi_pextp_phy1_i2c */
1078 PINCTRL_PIN_GROUP("xfi_pextp_phy1_i2c", mt7988_xfi_pextp_phy1_i2c
),
1079 /* @GPIO(5,6) mdc_mdio0 */
1080 PINCTRL_PIN_GROUP("mdc_mdio0", mt7988_mdc_mdio0
),
1081 /* @GPIO(7): pcie_wake_n0_0 */
1082 PINCTRL_PIN_GROUP("pcie_wake_n0_0", mt7988_pcie_wake_n0_0
),
1083 /* @GPIO(8): pcie_clk_req_n0_0 */
1084 PINCTRL_PIN_GROUP("pcie_clk_req_n0_0", mt7988_pcie_clk_req_n0_0
),
1085 /* @GPIO(9): pcie_wake_n3_0 */
1086 PINCTRL_PIN_GROUP("pcie_wake_n3_0", mt7988_pcie_wake_n3_0
),
1087 /* @GPIO(10): pcie_clk_req_n3 */
1088 PINCTRL_PIN_GROUP("pcie_clk_req_n3", mt7988_pcie_clk_req_n3
),
1089 /* @GPIO(10): pcie_clk_req_n0_1 */
1090 PINCTRL_PIN_GROUP("pcie_clk_req_n0_1", mt7988_pcie_clk_req_n0_1
),
1091 /* @GPIO(7,8) pcie_p0_phy_i2c */
1092 PINCTRL_PIN_GROUP("pcie_p0_phy_i2c", mt7988_pcie_p0_phy_i2c
),
1093 /* @GPIO(7,8) pcie_p1_phy_i2c */
1094 PINCTRL_PIN_GROUP("pcie_p1_phy_i2c", mt7988_pcie_p1_phy_i2c
),
1095 /* @GPIO(7,8) pcie_p2_phy_i2c */
1096 PINCTRL_PIN_GROUP("pcie_p2_phy_i2c", mt7988_pcie_p2_phy_i2c
),
1097 /* @GPIO(9,10) pcie_p3_phy_i2c */
1098 PINCTRL_PIN_GROUP("pcie_p3_phy_i2c", mt7988_pcie_p3_phy_i2c
),
1099 /* @GPIO(9,10) ckm_phy_i2c */
1100 PINCTRL_PIN_GROUP("ckm_phy_i2c", mt7988_ckm_phy_i2c
),
1101 /* @GPIO(11): pmic */
1102 PINCTRL_PIN_GROUP("pcie_pmic", mt7988_pmic
),
1103 /* @GPIO(12): watchdog */
1104 PINCTRL_PIN_GROUP("watchdog", mt7988_watchdog
),
1105 /* @GPIO(13): pcie_wake_n0_1 */
1106 PINCTRL_PIN_GROUP("pcie_wake_n0_1", mt7988_pcie_wake_n0_1
),
1107 /* @GPIO(14): pcie_wake_n3_1 */
1108 PINCTRL_PIN_GROUP("pcie_wake_n3_1", mt7988_pcie_wake_n3_1
),
1109 /* @GPIO(15,16) i2c0_1 */
1110 PINCTRL_PIN_GROUP("i2c0_1", mt7988_i2c0_1
),
1111 /* @GPIO(15,16) u30_phy_i2c0 */
1112 PINCTRL_PIN_GROUP("u30_phy_i2c0", mt7988_u30_phy_i2c0
),
1113 /* @GPIO(15,16) u32_phy_i2c0 */
1114 PINCTRL_PIN_GROUP("u32_phy_i2c0", mt7988_u32_phy_i2c0
),
1115 /* @GPIO(15,16) xfi_phy0_i2c1 */
1116 PINCTRL_PIN_GROUP("xfi_phy0_i2c1", mt7988_xfi_phy0_i2c1
),
1117 /* @GPIO(15,16) xfi_phy1_i2c1 */
1118 PINCTRL_PIN_GROUP("xfi_phy1_i2c1", mt7988_xfi_phy1_i2c1
),
1119 /* @GPIO(15,16) xfi_phy_pll_i2c2 */
1120 PINCTRL_PIN_GROUP("xfi_phy_pll_i2c2", mt7988_xfi_phy_pll_i2c2
),
1121 /* @GPIO(17,18) i2c1_0 */
1122 PINCTRL_PIN_GROUP("i2c1_0", mt7988_i2c1_0
),
1123 /* @GPIO(17,18) u30_phy_i2c1 */
1124 PINCTRL_PIN_GROUP("u30_phy_i2c1", mt7988_u30_phy_i2c1
),
1125 /* @GPIO(17,18) u32_phy_i2c1 */
1126 PINCTRL_PIN_GROUP("u32_phy_i2c1", mt7988_u32_phy_i2c1
),
1127 /* @GPIO(17,18) xfi_phy_pll_i2c3 */
1128 PINCTRL_PIN_GROUP("xfi_phy_pll_i2c3", mt7988_xfi_phy_pll_i2c3
),
1129 /* @GPIO(17,18) sgmii0_i2c */
1130 PINCTRL_PIN_GROUP("sgmii0_i2c", mt7988_sgmii0_i2c
),
1131 /* @GPIO(17,18) sgmii1_i2c */
1132 PINCTRL_PIN_GROUP("sgmii1_i2c", mt7988_sgmii1_i2c
),
1133 /* @GPIO(19): pcie_2l_0_pereset */
1134 PINCTRL_PIN_GROUP("pcie_2l_0_pereset", mt7988_pcie_2l_0_pereset
),
1135 /* @GPIO(20): pcie_1l_1_pereset */
1136 PINCTRL_PIN_GROUP("pcie_1l_1_pereset", mt7988_pcie_1l_1_pereset
),
1137 /* @GPIO(21): pwm1 */
1138 PINCTRL_PIN_GROUP("pwm1", mt7988_pwm1
),
1139 /* @GPIO(22,23) spi0_wp_hold */
1140 PINCTRL_PIN_GROUP("spi0_wp_hold", mt7988_spi0_wp_hold
),
1141 /* @GPIO(24,25,26,27) spi0 */
1142 PINCTRL_PIN_GROUP("spi0", mt7988_spi0
),
1143 /* @GPIO(28,29,30,31) spi1 */
1144 PINCTRL_PIN_GROUP("spi1", mt7988_spi1
),
1145 /* @GPIO(32,33,34,35) spi2 */
1146 PINCTRL_PIN_GROUP("spi2", mt7988_spi2
),
1147 /* @GPIO(36,37) spi2_wp_hold */
1148 PINCTRL_PIN_GROUP("spi2_wp_hold", mt7988_spi2_wp_hold
),
1149 /* @GPIO(22,23,24,25,26,27) snfi */
1150 PINCTRL_PIN_GROUP("snfi", mt7988_snfi
),
1151 /* @GPIO(22,23) tops_uart0_0 */
1152 PINCTRL_PIN_GROUP("tops_uart0_0", mt7988_tops_uart0_0
),
1153 /* @GPIO(28,29,30,31) uart2_0 */
1154 PINCTRL_PIN_GROUP("uart2_0", mt7988_uart2_0
),
1155 /* @GPIO(32,33,34,35) uart1_0 */
1156 PINCTRL_PIN_GROUP("uart1_0", mt7988_uart1_0
),
1157 /* @GPIO(32,33,34,35) uart2_1 */
1158 PINCTRL_PIN_GROUP("uart2_1", mt7988_uart2_1
),
1159 /* @GPIO(28) net_wo0_uart_txd_0 */
1160 PINCTRL_PIN_GROUP("net_wo0_uart_txd_0", mt7988_net_wo0_uart_txd_0
),
1161 /* @GPIO(29) net_wo1_uart_txd_0 */
1162 PINCTRL_PIN_GROUP("net_wo1_uart_txd_0", mt7988_net_wo1_uart_txd_0
),
1163 /* @GPIO(30) net_wo2_uart_txd_0 */
1164 PINCTRL_PIN_GROUP("net_wo2_uart_txd_0", mt7988_net_wo2_uart_txd_0
),
1165 /* @GPIO(28,29) tops_uart1_0 */
1166 PINCTRL_PIN_GROUP("tops_uart0_0", mt7988_tops_uart1_0
),
1167 /* @GPIO(30,31) tops_uart0_1 */
1168 PINCTRL_PIN_GROUP("tops_uart0_1", mt7988_tops_uart0_1
),
1169 /* @GPIO(36,37) tops_uart1_1 */
1170 PINCTRL_PIN_GROUP("tops_uart1_1", mt7988_tops_uart1_1
),
1171 /* @GPIO(32,33,34,35,36) udi */
1172 PINCTRL_PIN_GROUP("udi", mt7988_udi
),
1173 /* @GPIO(21,28,29,30,31,32,33,34,35,36,37) emmc_45 */
1174 PINCTRL_PIN_GROUP("emmc_45", mt7988_emmc_45
),
1175 /* @GPIO(32,33,34,35,36,37) sdcard */
1176 PINCTRL_PIN_GROUP("sdcard", mt7988_sdcard
),
1177 /* @GPIO(38,39,40,41,42,43,44,45,46,47,48,49) emmc_51 */
1178 PINCTRL_PIN_GROUP("emmc_51", mt7988_emmc_51
),
1179 /* @GPIO(28,29) 2p5g_ext_mdio */
1180 PINCTRL_PIN_GROUP("2p5g_ext_mdio", mt7988_2p5g_ext_mdio
),
1181 /* @GPIO(30,31) gbe_ext_mdio */
1182 PINCTRL_PIN_GROUP("gbe_ext_mdio", mt7988_gbe_ext_mdio
),
1183 /* @GPIO(50,51,52,53,54) i2s */
1184 PINCTRL_PIN_GROUP("i2s", mt7988_i2s
),
1185 /* @GPIO(50,51,52,53) pcm */
1186 PINCTRL_PIN_GROUP("pcm", mt7988_pcm
),
1187 /* @GPIO(55,56) uart0 */
1188 PINCTRL_PIN_GROUP("uart0", mt7988_uart0
),
1189 /* @GPIO(55,56) tops_uart0_2 */
1190 PINCTRL_PIN_GROUP("tops_uart0_2", mt7988_tops_uart0_2
),
1191 /* @GPIO(50,51,52,53) uart2_2 */
1192 PINCTRL_PIN_GROUP("uart2_2", mt7988_uart2_2
),
1193 /* @GPIO(50,51,52,53,54) wo0_jtag */
1194 PINCTRL_PIN_GROUP("wo0_jtag", mt7988_wo0_jtag
),
1195 /* @GPIO(50,51,52,53,54) wo1-wo1_jtag */
1196 PINCTRL_PIN_GROUP("wo1_jtag", mt7988_wo1_jtag
),
1197 /* @GPIO(50,51,52,53,54) wo2_jtag */
1198 PINCTRL_PIN_GROUP("wo2_jtag", mt7988_wo2_jtag
),
1199 /* @GPIO(57) pwm0 */
1200 PINCTRL_PIN_GROUP("pwm0", mt7988_pwm0
),
1201 /* @GPIO(58,59,60,61,62) jtag */
1202 PINCTRL_PIN_GROUP("jtag", mt7988_jtag
),
1203 /* @GPIO(58,59,60,61,62) tops_jtag0_1 */
1204 PINCTRL_PIN_GROUP("tops_jtag0_1", mt7988_tops_jtag0_1
),
1205 /* @GPIO(58,59,60,61) uart2_3 */
1206 PINCTRL_PIN_GROUP("uart2_3", mt7988_uart2_3
),
1207 /* @GPIO(58,59,60,61) uart1_1 */
1208 PINCTRL_PIN_GROUP("uart1_1", mt7988_uart1_1
),
1209 /* @GPIO(58,59,60,61) gbe_led1 */
1210 PINCTRL_PIN_GROUP("gbe0_led1", mt7988_gbe0_led1
),
1211 PINCTRL_PIN_GROUP("gbe1_led1", mt7988_gbe1_led1
),
1212 PINCTRL_PIN_GROUP("gbe2_led1", mt7988_gbe2_led1
),
1213 PINCTRL_PIN_GROUP("gbe3_led1", mt7988_gbe3_led1
),
1214 /* @GPIO(62) 2p5gbe_led1 */
1215 PINCTRL_PIN_GROUP("2p5gbe_led1", mt7988_2p5gbe_led1
),
1216 /* @GPIO(64,65,66,67) gbe_led0 */
1217 PINCTRL_PIN_GROUP("gbe0_led0", mt7988_gbe0_led0
),
1218 PINCTRL_PIN_GROUP("gbe1_led0", mt7988_gbe1_led0
),
1219 PINCTRL_PIN_GROUP("gbe2_led0", mt7988_gbe2_led0
),
1220 PINCTRL_PIN_GROUP("gbe3_led0", mt7988_gbe3_led0
),
1221 /* @GPIO(68) 2p5gbe_led0 */
1222 PINCTRL_PIN_GROUP("2p5gbe_led0", mt7988_2p5gbe_led0
),
1223 /* @GPIO(63) drv_vbus_p1 */
1224 PINCTRL_PIN_GROUP("drv_vbus_p1", mt7988_drv_vbus_p1
),
1225 /* @GPIO(63) pcie_clk_req_n2_1 */
1226 PINCTRL_PIN_GROUP("pcie_clk_req_n2_1", mt7988_pcie_clk_req_n2_1
),
1227 /* @GPIO(69, 70) mdc_mdio1 */
1228 PINCTRL_PIN_GROUP("mdc_mdio1", mt7988_mdc_mdio1
),
1229 /* @GPIO(69, 70) i2c1_2 */
1230 PINCTRL_PIN_GROUP("i2c1_2", mt7988_i2c1_2
),
1231 /* @GPIO(69) pwm6 */
1232 PINCTRL_PIN_GROUP("pwm6", mt7988_pwm6
),
1233 /* @GPIO(70) pwm7 */
1234 PINCTRL_PIN_GROUP("pwm7", mt7988_pwm7
),
1235 /* @GPIO(69,70) i2c2_0 */
1236 PINCTRL_PIN_GROUP("i2c2_0", mt7988_i2c2_0
),
1237 /* @GPIO(71,72) i2c2_1 */
1238 PINCTRL_PIN_GROUP("i2c2_1", mt7988_i2c2_1
),
1239 /* @GPIO(73) pcie_2l_1_pereset */
1240 PINCTRL_PIN_GROUP("pcie_2l_1_pereset", mt7988_pcie_2l_1_pereset
),
1241 /* @GPIO(74) pcie_1l_0_pereset */
1242 PINCTRL_PIN_GROUP("pcie_1l_0_pereset", mt7988_pcie_1l_0_pereset
),
1243 /* @GPIO(75) pcie_wake_n1_0 */
1244 PINCTRL_PIN_GROUP("pcie_wake_n1_0", mt7988_pcie_wake_n1_0
),
1245 /* @GPIO(76) pcie_clk_req_n1 */
1246 PINCTRL_PIN_GROUP("pcie_clk_req_n1", mt7988_pcie_clk_req_n1
),
1247 /* @GPIO(77) pcie_wake_n2_0 */
1248 PINCTRL_PIN_GROUP("pcie_wake_n2_0", mt7988_pcie_wake_n2_0
),
1249 /* @GPIO(78) pcie_clk_req_n2_0 */
1250 PINCTRL_PIN_GROUP("pcie_clk_req_n2_0", mt7988_pcie_clk_req_n2_0
),
1251 /* @GPIO(79) drv_vbus */
1252 PINCTRL_PIN_GROUP("drv_vbus", mt7988_drv_vbus
),
1253 /* @GPIO(79) pcie_wake_n2_1 */
1254 PINCTRL_PIN_GROUP("pcie_wake_n2_1", mt7988_pcie_wake_n2_1
),
1255 /* @GPIO(80,81,82,83) uart1_2 */
1256 PINCTRL_PIN_GROUP("uart1_2", mt7988_uart1_2
),
1257 /* @GPIO(80) pwm2 */
1258 PINCTRL_PIN_GROUP("pwm2", mt7988_pwm2
),
1259 /* @GPIO(81) pwm3 */
1260 PINCTRL_PIN_GROUP("pwm3", mt7988_pwm3
),
1261 /* @GPIO(82) pwm4 */
1262 PINCTRL_PIN_GROUP("pwm4", mt7988_pwm4
),
1263 /* @GPIO(83) pwm5 */
1264 PINCTRL_PIN_GROUP("pwm5", mt7988_pwm5
),
1265 /* @GPIO(80) net_wo0_uart_txd_0 */
1266 PINCTRL_PIN_GROUP("net_wo0_uart_txd_0", mt7988_net_wo0_uart_txd_0
),
1267 /* @GPIO(81) net_wo1_uart_txd_0 */
1268 PINCTRL_PIN_GROUP("net_wo1_uart_txd_0", mt7988_net_wo1_uart_txd_0
),
1269 /* @GPIO(82) net_wo2_uart_txd_0 */
1270 PINCTRL_PIN_GROUP("net_wo2_uart_txd_0", mt7988_net_wo2_uart_txd_0
),
1271 /* @GPIO(80,81) tops_uart1_2 */
1272 PINCTRL_PIN_GROUP("tops_uart1_2", mt7988_tops_uart1_2
),
1273 /* @GPIO(80) net_wo0_uart_txd_1 */
1274 PINCTRL_PIN_GROUP("net_wo0_uart_txd_1", mt7988_net_wo0_uart_txd_1
),
1275 /* @GPIO(81) net_wo1_uart_txd_1 */
1276 PINCTRL_PIN_GROUP("net_wo1_uart_txd_1", mt7988_net_wo1_uart_txd_1
),
1277 /* @GPIO(82) net_wo2_uart_txd_1 */
1278 PINCTRL_PIN_GROUP("net_wo2_uart_txd_1", mt7988_net_wo2_uart_txd_1
),
1281 /* Joint those groups owning the same capability in user point of view which
1282 * allows that people tend to use through the device tree.
1284 static const char *mt7988_jtag_groups
[] = {
1285 "tops_jtag0_0", "wo0_jtag", "wo1_jtag",
1286 "wo2_jtag", "jtag", "tops_jtag0_1",
1288 static const char *mt7988_int_usxgmii_groups
[] = {
1291 static const char *mt7988_pwm_groups
[] = {
1292 "pwm0", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5", "pwm6", "pwm7"
1294 static const char *mt7988_dfd_groups
[] = {
1297 static const char *mt7988_i2c_groups
[] = {
1304 "xfi_pextp_phy0_i2c",
1305 "xfi_pextp_phy1_i2c",
1322 static const char *mt7988_ethernet_groups
[] = {
1328 static const char *mt7988_pcie_groups
[] = {
1329 "pcie_wake_n0_0", "pcie_clk_req_n0_0", "pcie_wake_n3_0",
1330 "pcie_clk_req_n3", "pcie_p0_phy_i2c", "pcie_p1_phy_i2c",
1331 "pcie_p3_phy_i2c", "pcie_p2_phy_i2c", "ckm_phy_i2c",
1332 "pcie_wake_n0_1", "pcie_wake_n3_1", "pcie_2l_0_pereset",
1333 "pcie_1l_1_pereset", "pcie_clk_req_n2_1", "pcie_2l_1_pereset",
1334 "pcie_1l_0_pereset", "pcie_wake_n1_0", "pcie_clk_req_n1",
1335 "pcie_wake_n2_0", "pcie_clk_req_n2_0", "pcie_wake_n2_1",
1338 static const char *mt7988_pmic_groups
[] = {
1341 static const char *mt7988_wdt_groups
[] = {
1344 static const char *mt7988_spi_groups
[] = {
1345 "spi0", "spi0_wp_hold", "spi1", "spi2", "spi2_wp_hold",
1347 static const char *mt7988_flash_groups
[] = { "emmc_45", "sdcard", "snfi",
1349 static const char *mt7988_uart_groups
[] = {
1355 "net_wo0_uart_txd_0",
1356 "net_wo1_uart_txd_0",
1357 "net_wo2_uart_txd_0",
1367 "net_wo0_uart_txd_1",
1368 "net_wo1_uart_txd_1",
1369 "net_wo2_uart_txd_1",
1371 static const char *mt7988_udi_groups
[] = {
1374 static const char *mt7988_audio_groups
[] = {
1377 static const char *mt7988_led_groups
[] = {
1378 "gbe0_led1", "gbe1_led1", "gbe2_led1", "gbe3_led1", "2p5gbe_led1",
1379 "gbe0_led0", "gbe1_led0", "gbe2_led0", "gbe3_led0", "2p5gbe_led0",
1380 "wf5g_led0", "wf5g_led1",
1382 static const char *mt7988_usb_groups
[] = {
1387 static const struct function_desc mt7988_functions
[] = {
1388 { "audio", mt7988_audio_groups
, ARRAY_SIZE(mt7988_audio_groups
) },
1389 { "jtag", mt7988_jtag_groups
, ARRAY_SIZE(mt7988_jtag_groups
) },
1390 { "int_usxgmii", mt7988_int_usxgmii_groups
,
1391 ARRAY_SIZE(mt7988_int_usxgmii_groups
) },
1392 { "pwm", mt7988_pwm_groups
, ARRAY_SIZE(mt7988_pwm_groups
) },
1393 { "dfd", mt7988_dfd_groups
, ARRAY_SIZE(mt7988_dfd_groups
) },
1394 { "i2c", mt7988_i2c_groups
, ARRAY_SIZE(mt7988_i2c_groups
) },
1395 { "eth", mt7988_ethernet_groups
, ARRAY_SIZE(mt7988_ethernet_groups
) },
1396 { "pcie", mt7988_pcie_groups
, ARRAY_SIZE(mt7988_pcie_groups
) },
1397 { "pmic", mt7988_pmic_groups
, ARRAY_SIZE(mt7988_pmic_groups
) },
1398 { "watchdog", mt7988_wdt_groups
, ARRAY_SIZE(mt7988_wdt_groups
) },
1399 { "spi", mt7988_spi_groups
, ARRAY_SIZE(mt7988_spi_groups
) },
1400 { "flash", mt7988_flash_groups
, ARRAY_SIZE(mt7988_flash_groups
) },
1401 { "uart", mt7988_uart_groups
, ARRAY_SIZE(mt7988_uart_groups
) },
1402 { "udi", mt7988_udi_groups
, ARRAY_SIZE(mt7988_udi_groups
) },
1403 { "usb", mt7988_usb_groups
, ARRAY_SIZE(mt7988_usb_groups
) },
1404 { "led", mt7988_led_groups
, ARRAY_SIZE(mt7988_led_groups
) },
1407 static const struct mtk_eint_hw mt7988_eint_hw
= {
1410 .ap_num
= ARRAY_SIZE(mt7988_pins
),
1414 static const char *mt7988_pinctrl_register_base_names
[] = {
1415 "gpio_base", "iocfg_tr_base", "iocfg_br_base",
1416 "iocfg_rb_base", "iocfg_lb_base", "iocfg_tl_base",
1419 static struct mtk_pin_soc mt7988_data
= {
1420 .reg_cal
= mt7988_reg_cals
,
1421 .pins
= mt7988_pins
,
1422 .npins
= ARRAY_SIZE(mt7988_pins
),
1423 .grps
= mt7988_groups
,
1424 .ngrps
= ARRAY_SIZE(mt7988_groups
),
1425 .funcs
= mt7988_functions
,
1426 .nfuncs
= ARRAY_SIZE(mt7988_functions
),
1427 .eint_hw
= &mt7988_eint_hw
,
1429 .ies_present
= false,
1430 .base_names
= mt7988_pinctrl_register_base_names
,
1431 .nbase_names
= ARRAY_SIZE(mt7988_pinctrl_register_base_names
),
1432 .bias_disable_set
= mtk_pinconf_bias_disable_set
,
1433 .bias_disable_get
= mtk_pinconf_bias_disable_get
,
1434 .bias_set
= mtk_pinconf_bias_set
,
1435 .bias_get
= mtk_pinconf_bias_get
,
1436 .drive_set
= mtk_pinconf_drive_set_rev1
,
1437 .drive_get
= mtk_pinconf_drive_get_rev1
,
1438 .adv_pull_get
= mtk_pinconf_adv_pull_get
,
1439 .adv_pull_set
= mtk_pinconf_adv_pull_set
,
1442 static const struct of_device_id mt7988_pinctrl_of_match
[] = {
1444 .compatible
= "mediatek,mt7988-pinctrl",
1449 static int mt7988_pinctrl_probe(struct platform_device
*pdev
)
1451 return mtk_moore_pinctrl_probe(pdev
, &mt7988_data
);
1454 static struct platform_driver mt7988_pinctrl_driver
= {
1456 .name
= "mt7988-pinctrl",
1457 .of_match_table
= mt7988_pinctrl_of_match
,
1459 .probe
= mt7988_pinctrl_probe
,
1462 static int __init
mt7988_pinctrl_init(void)
1464 return platform_driver_register(&mt7988_pinctrl_driver
);
1466 arch_initcall(mt7988_pinctrl_init
);