224214e08363cd0e26e81a4bd8de4f3746caaa1f
[openwrt/staging/ynezz.git] / target / linux / mediatek / files-5.4 / arch / arm64 / boot / dts / mediatek / mt7622-elecom-wrc-2533gent.dts
1 /*
2 * Copyright (c) 2017 MediaTek Inc.
3 * Author: Ming Huang <ming.huang@mediatek.com>
4 * Sean Wang <sean.wang@mediatek.com>
5 *
6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 */
8
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
12
13 #include "mt7622.dtsi"
14 #include "mt6380.dtsi"
15
16 / {
17 model = "Elecom WRC-2533";
18 compatible = "elecom,wrc-2533gent", "mediatek,mt7622";
19
20 aliases {
21 led-boot = &led_power;
22 led-failsafe = &led_power;
23 led-running = &led_power;
24 led-upgrade = &led_power;
25 serial0 = &uart0;
26 };
27
28 chosen {
29 stdout-path = "serial0:115200n8";
30 bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 console=ttyS0,115200n8";
31 };
32
33 cpus {
34 cpu@0 {
35 proc-supply = <&mt6380_vcpu_reg>;
36 sram-supply = <&mt6380_vm_reg>;
37 };
38
39 cpu@1 {
40 proc-supply = <&mt6380_vcpu_reg>;
41 sram-supply = <&mt6380_vm_reg>;
42 };
43 };
44
45 gpio-keys {
46 compatible = "gpio-keys";
47 poll-interval = <100>;
48
49 wps {
50 label = "wps";
51 linux,code = <KEY_WPS_BUTTON>;
52 gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
53 };
54
55 factory {
56 label = "factory";
57 linux,code = <KEY_WPS_BUTTON>;
58 gpios = <&pio 102 GPIO_ACTIVE_LOW>;
59 };
60
61 switch0 {
62 label = "switch0";
63 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
64 linux,code = <BTN_0>;
65 linux,input-type = <EV_SW>;
66 };
67
68 switch1 {
69 label = "switch1";
70 gpios = <&pio 16 GPIO_ACTIVE_LOW>;
71 linux,code = <BTN_1>;
72 linux,input-type = <EV_SW>;
73 };
74
75 switch2 {
76 label = "switch2";
77 gpios = <&pio 17 GPIO_ACTIVE_LOW>;
78 linux,code = <BTN_2>;
79 linux,input-type = <EV_SW>;
80 };
81
82 switch3 {
83 label = "switch3";
84 gpios = <&pio 18 GPIO_ACTIVE_LOW>;
85 linux,code = <BTN_3>;
86 linux,input-type = <EV_SW>;
87 };
88 };
89
90 leds {
91 compatible = "gpio-leds";
92
93 led_power: power_g {
94 label = "wrc-2533:green:power";
95 gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
96 };
97
98 power_b {
99 label = "wrc-2533:blue:power";
100 gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
101 };
102
103 power_r {
104 label = "wrc-2533:red:power";
105 gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
106 };
107
108 usb {
109 label = "wrc-2533:blue:usb";
110 gpios = <&pio 74 GPIO_ACTIVE_HIGH>;
111 };
112
113 wps {
114 label = "wrc-2533:red:wps";
115 gpios = <&pio 76 GPIO_ACTIVE_LOW>;
116 };
117
118 wifi2 {
119 label = "wrc-2533:blue:wifi2g";
120 gpios = <&pio 85 GPIO_ACTIVE_LOW>;
121 };
122
123 wifi5 {
124 label = "wrc-2533:blue:wifi5g";
125 gpios = <&pio 91 GPIO_ACTIVE_LOW>;
126 };
127 };
128
129 reg_usb_vbus: regulator {
130 compatible = "regulator-fixed";
131 regulator-name = "usb_vbus";
132 regulator-min-microvolt = <5000000>;
133 regulator-max-microvolt = <5000000>;
134 gpio = <&pio 22 GPIO_ACTIVE_LOW>;
135 enable-active-high;
136 };
137
138 memory {
139 reg = <0 0x40000000 0 0x3F000000>;
140 };
141
142 reg_1p8v: regulator-1p8v {
143 compatible = "regulator-fixed";
144 regulator-name = "fixed-1.8V";
145 regulator-min-microvolt = <1800000>;
146 regulator-max-microvolt = <1800000>;
147 regulator-always-on;
148 };
149
150 reg_3p3v: regulator-3p3v {
151 compatible = "regulator-fixed";
152 regulator-name = "fixed-3.3V";
153 regulator-min-microvolt = <3300000>;
154 regulator-max-microvolt = <3300000>;
155 regulator-boot-on;
156 regulator-always-on;
157 };
158
159 rtkgsw: rtkgsw@0 {
160 compatible = "mediatek,rtk-gsw";
161 mediatek,ethsys = <&ethsys>;
162 mediatek,mdio = <&mdio>;
163 mediatek,reset-pin = <&pio 54 0>;
164 status = "okay";
165 };
166 };
167
168 &pcie {
169 pinctrl-names = "default", "pcie1_pins";
170 pinctrl-0 = <&pcie0_pins>;
171 pinctrl-1 = <&pcie1_pins>;
172 status = "okay";
173
174 pcie@0,0 {
175 status = "okay";
176 mt7615@0,0 {
177 reg = <0x0000 0 0 0 0>;
178 mediatek,mtd-eeprom = <&factory 0x05000>;
179 };
180 };
181 };
182
183 &pio {
184 /* eMMC is shared pin with parallel NAND */
185 emmc_pins_default: emmc-pins-default {
186 mux {
187 function = "emmc", "emmc_rst";
188 groups = "emmc";
189 };
190
191 /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
192 * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
193 * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
194 */
195 conf-cmd-dat {
196 pins = "NDL0", "NDL1", "NDL2",
197 "NDL3", "NDL4", "NDL5",
198 "NDL6", "NDL7", "NRB";
199 input-enable;
200 bias-pull-up;
201 };
202
203 conf-clk {
204 pins = "NCLE";
205 bias-pull-down;
206 };
207 };
208
209 emmc_pins_uhs: emmc-pins-uhs {
210 mux {
211 function = "emmc";
212 groups = "emmc";
213 };
214
215 conf-cmd-dat {
216 pins = "NDL0", "NDL1", "NDL2",
217 "NDL3", "NDL4", "NDL5",
218 "NDL6", "NDL7", "NRB";
219 input-enable;
220 drive-strength = <4>;
221 bias-pull-up;
222 };
223
224 conf-clk {
225 pins = "NCLE";
226 drive-strength = <4>;
227 bias-pull-down;
228 };
229 };
230
231 eth_pins: eth-pins {
232 mux {
233 function = "eth";
234 groups = "mdc_mdio", "rgmii_via_gmac2";
235 };
236 };
237
238 i2c1_pins: i2c1-pins {
239 mux {
240 function = "i2c";
241 groups = "i2c1_0";
242 };
243 };
244
245 i2c2_pins: i2c2-pins {
246 mux {
247 function = "i2c";
248 groups = "i2c2_0";
249 };
250 };
251
252 i2s1_pins: i2s1-pins {
253 mux {
254 function = "i2s";
255 groups = "i2s_out_mclk_bclk_ws",
256 "i2s1_in_data",
257 "i2s1_out_data";
258 };
259
260 conf {
261 pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
262 "I2S_WS", "I2S_MCLK";
263 drive-strength = <12>;
264 bias-pull-down;
265 };
266 };
267
268 irrx_pins: irrx-pins {
269 mux {
270 function = "ir";
271 groups = "ir_1_rx";
272 };
273 };
274
275 irtx_pins: irtx-pins {
276 mux {
277 function = "ir";
278 groups = "ir_1_tx";
279 };
280 };
281
282 /* Parallel nand is shared pin with eMMC */
283 parallel_nand_pins: parallel-nand-pins {
284 mux {
285 function = "flash";
286 groups = "par_nand";
287 };
288 };
289
290 pcie0_pins: pcie0-pins {
291 mux {
292 function = "pcie";
293 groups = "pcie0_pad_perst",
294 "pcie0_1_waken",
295 "pcie0_1_clkreq";
296 };
297 };
298
299 pcie1_pins: pcie1-pins {
300 mux {
301 function = "pcie";
302 groups = "pcie1_pad_perst",
303 "pcie1_0_waken",
304 "pcie1_0_clkreq";
305 };
306 };
307
308 pmic_bus_pins: pmic-bus-pins {
309 mux {
310 function = "pmic";
311 groups = "pmic_bus";
312 };
313 };
314
315 pwm7_pins: pwm1-2-pins {
316 mux {
317 function = "pwm";
318 groups = "pwm_ch7_2";
319 };
320 };
321
322 wled_pins: wled-pins {
323 mux {
324 function = "led";
325 groups = "wled";
326 };
327 };
328
329 sd0_pins_default: sd0-pins-default {
330 mux {
331 function = "sd";
332 groups = "sd_0";
333 };
334
335 /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
336 * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
337 * DAT2, DAT3, CMD, CLK for SD respectively.
338 */
339 conf-cmd-data {
340 pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
341 "I2S2_IN","I2S4_OUT";
342 input-enable;
343 drive-strength = <8>;
344 bias-pull-up;
345 };
346 conf-clk {
347 pins = "I2S3_OUT";
348 drive-strength = <12>;
349 bias-pull-down;
350 };
351 conf-cd {
352 pins = "TXD3";
353 bias-pull-up;
354 };
355 };
356
357 sd0_pins_uhs: sd0-pins-uhs {
358 mux {
359 function = "sd";
360 groups = "sd_0";
361 };
362
363 conf-cmd-data {
364 pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
365 "I2S2_IN","I2S4_OUT";
366 input-enable;
367 bias-pull-up;
368 };
369
370 conf-clk {
371 pins = "I2S3_OUT";
372 bias-pull-down;
373 };
374 };
375
376 /* Serial NAND is shared pin with SPI-NOR */
377 serial_nand_pins: serial-nand-pins {
378 mux {
379 function = "flash";
380 groups = "snfi";
381 };
382 };
383
384 spic0_pins: spic0-pins {
385 mux {
386 function = "spi";
387 groups = "spic0_0";
388 };
389 };
390
391 spic1_pins: spic1-pins {
392 mux {
393 function = "spi";
394 groups = "spic1_0";
395 };
396 };
397
398 /* SPI-NOR is shared pin with serial NAND */
399 spi_nor_pins: spi-nor-pins {
400 mux {
401 function = "flash";
402 groups = "spi_nor";
403 };
404 };
405
406 /* serial NAND is shared pin with SPI-NOR */
407 serial_nand_pins: serial-nand-pins {
408 mux {
409 function = "flash";
410 groups = "snfi";
411 };
412 };
413
414 uart0_pins: uart0-pins {
415 mux {
416 function = "uart";
417 groups = "uart0_0_tx_rx" ;
418 };
419 };
420
421 uart2_pins: uart2-pins {
422 mux {
423 function = "uart";
424 groups = "uart2_1_tx_rx" ;
425 };
426 };
427
428 watchdog_pins: watchdog-pins {
429 mux {
430 function = "watchdog";
431 groups = "watchdog";
432 };
433 };
434 };
435
436 &bch {
437 status = "okay";
438 };
439
440 &btif {
441 status = "okay";
442 };
443
444 &cir {
445 pinctrl-names = "default";
446 pinctrl-0 = <&irrx_pins>;
447 status = "okay";
448 };
449
450 &eth {
451 status = "okay";
452 pinctrl-names = "default";
453 pinctrl-0 = <&eth_pins>;
454 gmac0: mac@0 {
455 compatible = "mediatek,eth-mac";
456 reg = <0>;
457 phy-mode = "sgmii";
458 fixed-link {
459 speed = <1000>;
460 full-duplex;
461 pause;
462 };
463 };
464 gmac1: mac@1 {
465 compatible = "mediatek,eth-mac";
466 reg = <1>;
467 phy-mode = "rgmii";
468 fixed-link {
469 speed = <1000>;
470 full-duplex;
471 pause;
472 };
473 };
474 mdio: mdio-bus {
475 #address-cells = <1>;
476 #size-cells = <0>;
477 };
478 };
479
480 &i2c1 {
481 pinctrl-names = "default";
482 pinctrl-0 = <&i2c1_pins>;
483 status = "okay";
484 };
485
486 &i2c2 {
487 pinctrl-names = "default";
488 pinctrl-0 = <&i2c2_pins>;
489 status = "okay";
490 };
491
492 &pwm {
493 pinctrl-names = "default";
494 pinctrl-0 = <&pwm7_pins>;
495 status = "okay";
496 };
497
498 &pwrap {
499 pinctrl-names = "default";
500 pinctrl-0 = <&pmic_bus_pins>;
501
502 status = "okay";
503 };
504
505 &snfi {
506 pinctrl-names = "default";
507 pinctrl-0 = <&serial_nand_pins>;
508 status = "okay";
509
510 spi_nand@0 {
511 #address-cells = <1>;
512 #size-cells = <1>;
513 compatible = "spi-nand";
514 spi-max-frequency = <104000000>;
515 reg = <0>;
516
517 partitions {
518 compatible = "fixed-partitions";
519 #address-cells = <1>;
520 #size-cells = <1>;
521
522 partition@0 {
523 label = "Preloader";
524 reg = <0x00000 0x0080000>;
525 read-only;
526 };
527
528 partition@80000 {
529 label = "ATF";
530 reg = <0x80000 0x0040000>;
531 read-only;
532 };
533
534 partition@c0000 {
535 label = "uboot";
536 reg = <0xc0000 0x0080000>;
537 read-only;
538 };
539
540 partition@140000 {
541 label = "uboot-env";
542 reg = <0x140000 0x0080000>;
543 read-only;
544 };
545
546 factory: partition@1c0000 {
547 label = "factory";
548 reg = <0x1c0000 0x0040000>;
549 read-only;
550 };
551
552 partition@200000 {
553 label = "firmware";
554 reg = <0x200000 0x2000000>;
555 };
556
557 partition@2200000 {
558 label = "reserved";
559 reg = <0x2200000 0x4000000>;
560 };
561 };
562 };
563 };
564
565 &spi0 {
566 pinctrl-names = "default";
567 pinctrl-0 = <&spic0_pins>;
568 status = "okay";
569 };
570
571 &spi1 {
572 pinctrl-names = "default";
573 pinctrl-0 = <&spic1_pins>;
574 status = "okay";
575 };
576
577 &ssusb {
578 vusb33-supply = <&reg_3p3v>;
579 vbus-supply = <&reg_usb_vbus>;
580 status = "okay";
581 };
582
583 &u3phy {
584 status = "okay";
585 };
586
587 &uart0 {
588 pinctrl-names = "default";
589 pinctrl-0 = <&uart0_pins>;
590 status = "okay";
591 };
592
593 &uart2 {
594 pinctrl-names = "default";
595 pinctrl-0 = <&uart2_pins>;
596 status = "okay";
597 };
598
599 &watchdog {
600 pinctrl-names = "default";
601 pinctrl-0 = <&watchdog_pins>;
602 status = "okay";
603 };
604
605 &wmac {
606 mediatek,mtd-eeprom = <&factory 0x0000>;
607 status = "okay";
608 };