1 #include <linux/kernel.h>
2 #include <linux/delay.h>
3 #include "./include/rtk_switch.h"
4 #include "./include/vlan.h"
5 #include "./include/port.h"
6 #include "./include/rate.h"
7 #include "./include/rtk_hal.h"
8 #include "./include/l2.h"
9 #include "./include/stat.h"
10 #include "./include/igmp.h"
11 #include "./include/trap.h"
12 #include "./include/leaky.h"
13 #include "./include/mirror.h"
14 #include "./include/rtl8367c_asicdrv_port.h"
15 #include "./include/rtl8367c_asicdrv_mib.h"
16 #include "./include/smi.h"
17 #include "./include/qos.h"
18 #include "./include/trunk.h"
20 void rtk_hal_switch_init(void)
22 if(rtk_switch_init() != 0)
23 printk("rtk_switch_init failed\n");
26 if (rtk_vlan_init() != 0)
27 printk("rtk_vlan_init failed\n");
30 void rtk_hal_dump_full_mib(void)
33 rtk_stat_counter_t Cntr
;
34 rtk_stat_port_type_t cntr_idx
;
36 for (port
= UTP_PORT0
; port
< (UTP_PORT0
+ 5); port
++) {
37 printk("\nPort%d\n", port
);
38 for (cntr_idx
= STAT_IfInOctets
; cntr_idx
< STAT_PORT_CNTR_END
; cntr_idx
++) {
39 rtk_stat_port_get(port
, cntr_idx
, &Cntr
);
40 printk("%8llu ", Cntr
);
41 if (((cntr_idx
%10) == 9))
46 for (port
= EXT_PORT0
; port
< (EXT_PORT0
+ 2); port
++) {
47 printk("\nPort%d\n", port
);
48 for (cntr_idx
= STAT_IfInOctets
; cntr_idx
< STAT_PORT_CNTR_END
; cntr_idx
++) {
49 rtk_stat_port_get(port
, cntr_idx
, &Cntr
);
50 printk("%8llu ", Cntr
);
51 if (((cntr_idx
%10) == 9))
55 rtk_stat_global_reset();
57 void rtk_dump_mib_type(rtk_stat_port_type_t cntr_idx
)
60 rtk_stat_counter_t Cntr
;
62 for (port
= UTP_PORT0
; port
< (UTP_PORT0
+ 5); port
++) {
63 rtk_stat_port_get(port
, cntr_idx
, &Cntr
);
64 printk("%8llu", Cntr
);
66 for (port
= EXT_PORT0
; port
< (EXT_PORT0
+ 2); port
++) {
67 rtk_stat_port_get(port
, cntr_idx
, &Cntr
);
68 printk("%8llu", Cntr
);
73 void rtk_hal_dump_mib(void)
76 printk("==================%8s%8s%8s%8s%8s%8s%8s\n", "Port0", "Port1",
77 "Port2", "Port3", "Port4", "Port16", "Port17");
78 /* Get TX Unicast Pkts */
79 printk("TX Unicast Pkts :");
80 rtk_dump_mib_type(STAT_IfOutUcastPkts
);
81 /* Get TX Multicast Pkts */
82 printk("TX Multicast Pkts:");
83 rtk_dump_mib_type(STAT_IfOutMulticastPkts
);
84 /* Get TX BroadCast Pkts */
85 printk("TX BroadCast Pkts:");
86 rtk_dump_mib_type(STAT_IfOutBroadcastPkts
);
87 /* Get TX Collisions */
88 /* Get TX Puase Frames */
89 printk("TX Pause Frames :");
90 rtk_dump_mib_type(STAT_Dot3OutPauseFrames
);
91 /* Get TX Drop Events */
92 /* Get RX Unicast Pkts */
93 printk("RX Unicast Pkts :");
94 rtk_dump_mib_type(STAT_IfInUcastPkts
);
95 /* Get RX Multicast Pkts */
96 printk("RX Multicast Pkts:");
97 rtk_dump_mib_type(STAT_IfInMulticastPkts
);
98 /* Get RX Broadcast Pkts */
99 printk("RX Broadcast Pkts:");
100 rtk_dump_mib_type(STAT_IfInBroadcastPkts
);
101 /* Get RX FCS Erros */
102 printk("RX FCS Errors :");
103 rtk_dump_mib_type(STAT_Dot3StatsFCSErrors
);
104 /* Get RX Undersize Pkts */
105 printk("RX Undersize Pkts:");
106 rtk_dump_mib_type(STAT_EtherStatsUnderSizePkts
);
107 /* Get RX Discard Pkts */
108 printk("RX Discard Pkts :");
109 rtk_dump_mib_type(STAT_Dot1dTpPortInDiscards
);
110 /* Get RX Fragments */
111 printk("RX Fragments :");
112 rtk_dump_mib_type(STAT_EtherStatsFragments
);
113 /* Get RX Oversize Pkts */
114 printk("RX Oversize Pkts :");
115 rtk_dump_mib_type(STAT_EtherOversizeStats
);
117 printk("RX Jabbers :");
118 rtk_dump_mib_type(STAT_EtherStatsJabbers
);
119 /* Get RX Pause Frames */
120 printk("RX Pause Frames :");
121 rtk_dump_mib_type(STAT_Dot3InPauseFrames
);
123 rtk_stat_global_reset();
125 EXPORT_SYMBOL(rtk_hal_dump_mib
);
127 int rtk_hal_dump_vlan(void)
132 printk("vid portmap\n");
133 for (i
= 0; i
< RTK_SW_VID_RANGE
; i
++) {
134 rtk_vlan_get(i
, &vlan
);
137 RTK_PORTMASK_IS_PORT_SET(vlan
.mbr
,
138 UTP_PORT0
) ? '1' : '-');
140 RTK_PORTMASK_IS_PORT_SET(vlan
.mbr
,
141 UTP_PORT1
) ? '1' : '-');
143 RTK_PORTMASK_IS_PORT_SET(vlan
.mbr
,
144 UTP_PORT2
) ? '1' : '-');
146 RTK_PORTMASK_IS_PORT_SET(vlan
.mbr
,
147 UTP_PORT3
) ? '1' : '-');
149 RTK_PORTMASK_IS_PORT_SET(vlan
.mbr
,
150 UTP_PORT4
) ? '1' : '-');
152 RTK_PORTMASK_IS_PORT_SET(vlan
.mbr
,
153 EXT_PORT0
) ? '1' : '-');
155 RTK_PORTMASK_IS_PORT_SET(vlan
.mbr
,
156 EXT_PORT1
) ? '1' : '-');
162 void rtk_hal_clear_vlan(void)
166 ret
= rtk_vlan_reset();
167 if (ret
!= RT_ERR_OK
)
168 printk("rtk_vlan_reset failed\n");
171 int rtk_hal_set_vlan(struct ra_switch_ioctl_data
*data
)
177 /* clear vlan entry first */
178 memset(&vlan
, 0x00, sizeof(rtk_vlan_cfg_t
));
179 RTK_PORTMASK_CLEAR(vlan
.mbr
);
180 RTK_PORTMASK_CLEAR(vlan
.untag
);
181 rtk_vlan_set(data
->vid
, &vlan
);
183 memset(&vlan
, 0x00, sizeof(rtk_vlan_cfg_t
));
184 for (i
= 0; i
< 5; i
++) {
185 if (data
->port_map
& (1 << i
)) {
186 RTK_PORTMASK_PORT_SET(vlan
.mbr
, i
);
187 RTK_PORTMASK_PORT_SET(vlan
.untag
, i
);
188 rtk_vlan_portPvid_set(i
, data
->vid
, 0);
191 for (i
= 0; i
< 2; i
++) {
192 if (data
->port_map
& (1 << (i
+ 5))) {
193 RTK_PORTMASK_PORT_SET(vlan
.mbr
, (i
+ EXT_PORT0
));
194 RTK_PORTMASK_PORT_SET(vlan
.untag
, (i
+ EXT_PORT0
));
195 rtk_vlan_portPvid_set((i
+ EXT_PORT0
), data
->vid
, 0);
199 ret
= rtk_vlan_set(data
->vid
, &vlan
);
204 void rtk_hal_vlan_portpvid_set(rtk_port_t port
, rtk_vlan_t pvid
, rtk_pri_t priority
)
206 rtk_vlan_portPvid_set(port
, pvid
, priority
);
209 int rtk_hal_set_ingress_rate(struct ra_switch_ioctl_data
*data
)
213 if (data
->on_off
== 1)
215 rtk_rate_igrBandwidthCtrlRate_set(data
->port
, data
->bw
, 0,
219 rtk_rate_igrBandwidthCtrlRate_set(data
->port
, 1048568, 0,
225 int rtk_hal_set_egress_rate(struct ra_switch_ioctl_data
*data
)
229 if (data
->on_off
== 1)
231 rtk_rate_egrBandwidthCtrlRate_set(data
->port
, data
->bw
, 1);
233 ret
= rtk_rate_egrBandwidthCtrlRate_set(data
->port
, 1048568, 1);
238 void rtk_hal_dump_table(void)
241 rtk_uint32 address
= 0;
242 rtk_l2_ucastAddr_t l2_data
;
243 rtk_l2_ipMcastAddr_t ipMcastAddr
;
245 printk("hash port(0:17) fid vid mac-address\n");
247 if (rtk_l2_addr_next_get(READMETHOD_NEXT_L2UC
, UTP_PORT0
, &address
, &l2_data
) != RT_ERR_OK
) {
250 printk("%03x ", l2_data
.address
);
251 for (i
= 0; i
< 5; i
++)
252 if ( l2_data
.port
== i
)
256 for (i
= 16; i
< 18; i
++)
257 if ( l2_data
.port
== i
)
262 printk(" %2d", l2_data
.fid
);
263 printk(" %4d", l2_data
.cvid
);
264 printk(" %02x%02x%02x%02x%02x%02x\n", l2_data
.mac
.octet
[0],
265 l2_data
.mac
.octet
[1], l2_data
.mac
.octet
[2], l2_data
.mac
.octet
[3],
266 l2_data
.mac
.octet
[4], l2_data
.mac
.octet
[5]);
273 if (rtk_l2_ipMcastAddr_next_get(&address
, &ipMcastAddr
) != RT_ERR_OK
) {
276 printk("%03x ", ipMcastAddr
.address
);
277 for (i
= 0; i
< 5; i
++)
278 printk("%c", RTK_PORTMASK_IS_PORT_SET(ipMcastAddr
.portmask
, i
) ? '1' : '-');
279 for (i
= 16; i
< 18; i
++)
280 printk("%c", RTK_PORTMASK_IS_PORT_SET(ipMcastAddr
.portmask
, i
) ? '1' : '-');
282 printk("01005E%06x\n", (ipMcastAddr
.dip
& 0xefffff));
288 void rtk_hal_clear_table(void)
292 ret
= rtk_l2_table_clear();
293 if (ret
!= RT_ERR_OK
)
294 printk("rtk_l2_table_clear failed\n");
297 void rtk_hal_add_table(struct ra_switch_ioctl_data
*data
)
300 rtk_l2_ucastAddr_t l2_entry
;
303 mac
.octet
[0] =data
->mac
[0];
304 mac
.octet
[1] =data
->mac
[1];
305 mac
.octet
[2] =data
->mac
[2];
306 mac
.octet
[3] =data
->mac
[3];
307 mac
.octet
[4] =data
->mac
[4];
308 mac
.octet
[5] =data
->mac
[5];
310 memset(&l2_entry
, 0x00, sizeof(rtk_l2_ucastAddr_t
));
311 l2_entry
.port
= data
->port
;
313 l2_entry
.cvid
= data
->vid
;
316 l2_entry
.is_static
= 1;
317 ret
= rtk_l2_addr_add(&mac
, &l2_entry
);
318 if (ret
!= RT_ERR_OK
)
319 printk("rtk_hal_add_table failed\n");
322 void rtk_hal_del_table(struct ra_switch_ioctl_data
*data
)
325 rtk_l2_ucastAddr_t l2_entry
;
328 mac
.octet
[0] =data
->mac
[0];
329 mac
.octet
[1] =data
->mac
[1];
330 mac
.octet
[2] =data
->mac
[2];
331 mac
.octet
[3] =data
->mac
[3];
332 mac
.octet
[4] =data
->mac
[4];
333 mac
.octet
[5] =data
->mac
[5];
335 memset(&l2_entry
, 0x00, sizeof(rtk_l2_ucastAddr_t
));
336 l2_entry
.port
= data
->port
;
338 l2_entry
.cvid
= data
->vid
;
341 ret
= rtk_l2_addr_del(&mac
, &l2_entry
);
342 if (ret
!= RT_ERR_OK
)
343 printk("rtk_hal_add_table failed\n");
345 void rtk_hal_get_phy_status(struct ra_switch_ioctl_data
*data
)
347 rtk_port_linkStatus_t linkStatus
;
348 rtk_port_speed_t speed
;
349 rtk_port_duplex_t duplex
;
351 rtk_port_phyStatus_get(data
->port
, &linkStatus
, &speed
, &duplex
);
352 printk("Port%d Status:\n", data
->port
);
353 if (linkStatus
== 1) {
362 printk(" Half Duplex\n");
364 printk(" Full Duplex\n");
366 printk("Link Down\n");
370 void rtk_hal_set_port_mirror(struct ra_switch_ioctl_data
*data
)
372 rtk_portmask_t rx_portmask
;
373 rtk_portmask_t tx_portmask
;
377 rtk_mirror_portIso_set(ENABLED
);
378 RTK_PORTMASK_CLEAR(rx_portmask
);
379 RTK_PORTMASK_CLEAR(tx_portmask
);
380 for (i
= 0; i
< 5; i
++)
381 if (data
->rx_port_map
& (1 << i
))
382 RTK_PORTMASK_PORT_SET(rx_portmask
, i
);
383 for (i
= 0; i
< 2; i
++)
384 if (data
->rx_port_map
& (1 << (i
+ 5)))
385 RTK_PORTMASK_PORT_SET(rx_portmask
, (i
+ EXT_PORT0
));
387 RTK_PORTMASK_CLEAR(tx_portmask
);
388 for (i
= 0; i
< 5; i
++)
389 if (data
->tx_port_map
& (1 << i
))
390 RTK_PORTMASK_PORT_SET(tx_portmask
, i
);
391 for (i
= 0; i
< 2; i
++)
392 if (data
->tx_port_map
& (1 << (i
+ 5)))
393 RTK_PORTMASK_PORT_SET(tx_portmask
, (i
+ EXT_PORT0
));
395 ret
= rtk_mirror_portBased_set(data
->port
, &rx_portmask
, &tx_portmask
);
397 printk("rtk_mirror_portBased_set success\n");
400 void rtk_hal_read_reg(struct ra_switch_ioctl_data
*data
)
404 retVal
= smi_read(data
->reg_addr
, &data
->reg_val
);
405 if(retVal
!= RT_ERR_OK
)
406 printk("switch reg read failed\n");
408 printk("reg0x%x = 0x%x\n", data
->reg_addr
, data
->reg_val
);
411 void rtk_hal_write_reg(struct ra_switch_ioctl_data
*data
)
415 retVal
= smi_write(data
->reg_addr
, data
->reg_val
);
416 if(retVal
!= RT_ERR_OK
)
417 printk("switch reg write failed\n");
419 printk("write switch reg0x%x 0x%x success\n", data
->reg_addr
, data
->reg_val
);
422 void rtk_hal_get_phy_reg(struct ra_switch_ioctl_data
*data
)
425 rtk_port_phy_data_t Data
;
427 retVal
= rtk_port_phyReg_get(data
->port
, data
->reg_addr
, &Data
);
428 if (retVal
== RT_ERR_OK
)
429 printk("Get: phy[%d].reg[%d] = 0x%04x\n", data
->port
, data
->reg_addr
, Data
);
431 printk("read phy reg failed\n");
434 void rtk_hal_set_phy_reg(struct ra_switch_ioctl_data
*data
)
438 retVal
= rtk_port_phyReg_set(data
->port
, data
->reg_addr
, data
->reg_val
);
439 if (retVal
== RT_ERR_OK
)
440 printk("Set: phy[%d].reg[%d] = 0x%04x\n", data
->port
, data
->reg_addr
, data
->reg_val
);
442 printk("write phy reg failed\n");
444 void rtk_hal_qos_en(struct ra_switch_ioctl_data
*data
)
447 if (data
->on_off
== 1) {
448 if (rtk_qos_init(8) != 0)
449 printk("rtk_qos_init(8) failed\n");
452 if (rtk_qos_init(1) != 0)
453 printk("rtk_qos_init(1) failed\n");
457 void rtk_hal_qos_set_table2type(struct ra_switch_ioctl_data
*data
)
460 rtk_priority_select_t PriDec
;
462 /* write all pri to 0 */
464 PriDec
.dot1q_pri
= 0;
466 PriDec
.cvlan_pri
= 0;
467 PriDec
.svlan_pri
= 0;
472 if (data
->qos_type
== 0)
474 else if (data
->qos_type
== 1)
475 PriDec
.dot1q_pri
= 1;
476 else if (data
->qos_type
== 2)
478 else if (data
->qos_type
== 3)
480 else if (data
->qos_type
== 4)
481 PriDec
.cvlan_pri
= 1;
482 else if (data
->qos_type
== 5)
483 PriDec
.svlan_pri
= 1;
484 else if (data
->qos_type
== 6)
486 else if (data
->qos_type
== 7)
489 if (data
->qos_table_idx
== 0)
490 ret
= rtk_qos_priSel_set(PRIDECTBL_IDX0
, &PriDec
);
492 ret
= rtk_qos_priSel_set(PRIDECTBL_IDX1
, &PriDec
);
495 printk("rtk_qos_priSel_set failed\n");
499 void rtk_hal_qos_get_table2type(struct ra_switch_ioctl_data
*data
)
502 rtk_priority_select_t PriDec
;
504 if (data
->qos_table_idx
== 0)
505 ret
= rtk_qos_priSel_get(PRIDECTBL_IDX0
, &PriDec
);
507 ret
= rtk_qos_priSel_get(PRIDECTBL_IDX1
, &PriDec
);
510 printk("rtk_qos_priSel_set failed\n");
512 printk("port_pri = %d\n", PriDec
.port_pri
);
513 printk("dot1q_pri = %d\n", PriDec
.dot1q_pri
);
514 printk("acl_pri = %d\n", PriDec
.acl_pri
);
515 printk("dscp_pri = %d\n", PriDec
.dscp_pri
);
516 printk("cvlan_pri = %d\n", PriDec
.cvlan_pri
);
517 printk("svlan_pri = %d\n", PriDec
.svlan_pri
);
518 printk("dmac_pri = %d\n", PriDec
.dmac_pri
);
519 printk("smac_pri = %d\n", PriDec
.smac_pri
);
523 void rtk_hal_qos_set_port2table(struct ra_switch_ioctl_data
*data
)
527 ret
= rtk_qos_portPriSelIndex_set(data
->port
, data
->qos_table_idx
);
529 printk("rtk_qos_portPriSelIndex_set failed\n");
532 void rtk_hal_qos_get_port2table(struct ra_switch_ioctl_data
*data
)
535 rtk_qos_priDecTbl_t Index
;
537 ret
= rtk_qos_portPriSelIndex_get(data
->port
, &Index
);
539 printk("rtk_qos_portPriSelIndex_set failed\n");
541 printk("port%d belongs to table%d\n", data
->port
, Index
);
544 void rtk_hal_qos_set_port2pri(struct ra_switch_ioctl_data
*data
)
548 ret
= rtk_qos_portPri_set(data
->port
, data
->qos_pri
);
550 printk("rtk_qos_portPri_set failed\n");
553 void rtk_hal_qos_get_port2pri(struct ra_switch_ioctl_data
*data
)
558 ret
= rtk_qos_portPri_get(data
->port
, &Int_pri
);
560 printk("rtk_qos_portPri_set failed\n");
562 printk("port%d priority = %d\n", data
->port
, Int_pri
);
565 void rtk_hal_qos_set_dscp2pri(struct ra_switch_ioctl_data
*data
)
569 ret
= rtk_qos_dscpPriRemap_set(data
->qos_dscp
, data
->qos_pri
);
571 printk("rtk_qos_dscpPriRemap_set failed\n");
574 void rtk_hal_qos_get_dscp2pri(struct ra_switch_ioctl_data
*data
)
579 ret
= rtk_qos_dscpPriRemap_get(data
->qos_dscp
, &Int_pri
);
581 printk("rtk_qos_dscpPriRemap_set failed\n");
583 printk("dscp%d priority is %d\n", data
->qos_dscp
, Int_pri
);
586 void rtk_hal_qos_set_pri2queue(struct ra_switch_ioctl_data
*data
)
589 rtk_qos_pri2queue_t pri2qid
;
591 ret
= rtk_qos_priMap_get(8, &pri2qid
);
592 pri2qid
.pri2queue
[data
->qos_queue_num
] = data
->qos_pri
;
593 ret
= rtk_qos_priMap_set(8, &pri2qid
);
595 printk("rtk_qos_priMap_set failed\n");
598 void rtk_hal_qos_get_pri2queue(struct ra_switch_ioctl_data
*data
)
602 rtk_qos_pri2queue_t pri2qid
;
604 ret
= rtk_qos_priMap_get(8, &pri2qid
);
606 printk("rtk_qos_priMap_get failed\n");
608 for (i
= 0; i
< 8; i
++)
609 printk("pri2qid.pri2queue[%d] = %d\n", i
, pri2qid
.pri2queue
[i
]);
613 void rtk_hal_qos_set_queue_weight(struct ra_switch_ioctl_data
*data
)
616 rtk_qos_queue_weights_t qweights
;
618 ret
= rtk_qos_schedulingQueue_get(data
->port
, &qweights
);
619 qweights
.weights
[data
->qos_queue_num
] = data
->qos_weight
;
620 ret
= rtk_qos_schedulingQueue_set(data
->port
, &qweights
);
622 printk("rtk_qos_schedulingQueue_set failed\n");
625 void rtk_hal_qos_get_queue_weight(struct ra_switch_ioctl_data
*data
)
629 rtk_qos_queue_weights_t qweights
;
631 ret
= rtk_qos_schedulingQueue_get(data
->port
, &qweights
);
633 printk("rtk_qos_schedulingQueue_get failed\n");
635 printk("=== Port%d queue weight ===\n", data
->port
);
636 for (i
= 0; i
< 8; i
++)
637 printk("qweights.weights[%d] = %d\n",i
,qweights
.weights
[i
]);
641 void rtk_hal_enable_igmpsnoop(struct ra_switch_ioctl_data
*data
)
644 rtk_portmask_t pmask
;
647 ret
= rtk_igmp_init();
648 if (data
->on_off
== 1) {
649 RTK_PORTMASK_CLEAR(pmask
);
650 RTK_PORTMASK_PORT_SET(pmask
, EXT_PORT0
);
651 ret
|= rtk_igmp_static_router_port_set(&pmask
);
652 ret
|= rtk_igmp_protocol_set(UTP_PORT4
, PROTOCOL_IGMPv1
, IGMP_ACTION_FORWARD
);
653 ret
|= rtk_igmp_protocol_set(UTP_PORT4
, PROTOCOL_IGMPv2
, IGMP_ACTION_FORWARD
);
654 ret
|= rtk_igmp_protocol_set(UTP_PORT4
, PROTOCOL_MLDv1
, IGMP_ACTION_FORWARD
);
655 ret
|= rtk_igmp_protocol_set(EXT_PORT1
, PROTOCOL_IGMPv1
, IGMP_ACTION_FORWARD
);
656 ret
|= rtk_igmp_protocol_set(EXT_PORT1
, PROTOCOL_IGMPv2
, IGMP_ACTION_FORWARD
);
657 ret
|= rtk_igmp_protocol_set(EXT_PORT1
, PROTOCOL_MLDv1
, IGMP_ACTION_FORWARD
);
658 ret
|= rtk_igmp_protocol_set(UTP_PORT0
, PROTOCOL_IGMPv3
, IGMP_ACTION_ASIC
);
659 ret
|= rtk_igmp_protocol_set(UTP_PORT1
, PROTOCOL_IGMPv3
, IGMP_ACTION_ASIC
);
660 ret
|= rtk_igmp_protocol_set(UTP_PORT2
, PROTOCOL_IGMPv3
, IGMP_ACTION_ASIC
);
661 ret
|= rtk_igmp_protocol_set(UTP_PORT3
, PROTOCOL_IGMPv3
, IGMP_ACTION_ASIC
);
662 ret
|= rtk_igmp_protocol_set(EXT_PORT0
, PROTOCOL_IGMPv3
, IGMP_ACTION_ASIC
);
664 ret
|= rtk_leaky_vlan_set(LEAKY_IPMULTICAST
, ENABLED
);
665 ret
|= rtk_l2_ipMcastForwardRouterPort_set(DISABLED
);
666 /* drop unknown multicast packets*/
667 /* ret |= rtk_trap_unknownMcastPktAction_set(UTP_PORT4, MCAST_IPV4, MCAST_ACTION_DROP);*/
669 RTK_PORTMASK_CLEAR(pmask
);
670 RTK_PORTMASK_PORT_SET(pmask
, EXT_PORT0
);
671 RTK_PORTMASK_PORT_SET(pmask
, EXT_PORT1
);
672 ret
|= rtk_igmp_protocol_set(UTP_PORT0
, PROTOCOL_IGMPv3
, IGMP_ACTION_ASIC
);
673 ret
|= rtk_igmp_protocol_set(UTP_PORT1
, PROTOCOL_IGMPv3
, IGMP_ACTION_ASIC
);
674 ret
|= rtk_igmp_protocol_set(UTP_PORT2
, PROTOCOL_IGMPv3
, IGMP_ACTION_ASIC
);
675 ret
|= rtk_igmp_protocol_set(UTP_PORT3
, PROTOCOL_IGMPv3
, IGMP_ACTION_ASIC
);
676 ret
|= rtk_igmp_protocol_set(EXT_PORT0
, PROTOCOL_IGMPv3
, IGMP_ACTION_ASIC
);
678 ret
|= rtk_igmp_static_router_port_set(&pmask
);
681 printk("enable switch igmpsnoop failed\n");
684 void rtk_hal_disable_igmpsnoop(void)
686 if (rtk_igmp_state_set(DISABLED
) != RT_ERR_OK
)
687 printk("Disable IGMP SNOOPING failed\n");
690 rtk_api_ret_t
rtk_port_phyTestMode_set(rtk_port_t port
, rtk_port_phy_test_mode_t mode
)
692 rtk_uint32 data
, regData
, i
;
693 rtk_api_ret_t retVal
;
695 RTK_CHK_PORT_IS_UTP(port
);
697 if(mode
>= PHY_TEST_MODE_END
)
700 if( (mode
== PHY_TEST_MODE_2
) || (mode
== PHY_TEST_MODE_3
) )
703 if (PHY_TEST_MODE_NORMAL
!= mode
)
705 /* Other port should be Normal mode */
706 RTK_SCAN_ALL_LOG_PORT(i
)
708 if(rtk_switch_isUtpPort(i
) == RT_ERR_OK
)
712 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(i
), 9, &data
)) != RT_ERR_OK
)
715 if((data
& 0xE000) != 0)
716 return RT_ERR_NOT_ALLOWED
;
722 if ((retVal
= rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port
), 9, &data
)) != RT_ERR_OK
)
726 data
|= (mode
<< 13);
727 if ((retVal
= rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port
), 9, data
)) != RT_ERR_OK
)
730 if (PHY_TEST_MODE_4
== mode
)
732 if((retVal
= rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK
)
735 if((retVal
= rtl8367c_getAsicReg(0x1300, ®Data
)) != RT_ERR_OK
)
738 if( (regData
== 0x0276) || (regData
== 0x0597) )
740 if ((retVal
= rtl8367c_setAsicPHYOCPReg(rtk_switch_port_L2P_get(port
), 0xbcc2, 0xF4F4)) != RT_ERR_OK
)
744 if( (regData
== 0x6367) )
746 if ((retVal
= rtl8367c_setAsicPHYOCPReg(rtk_switch_port_L2P_get(port
), 0xa436, 0x80c1)) != RT_ERR_OK
)
749 if ((retVal
= rtl8367c_setAsicPHYOCPReg(rtk_switch_port_L2P_get(port
), 0xa438, 0xfe00)) != RT_ERR_OK
)
757 void rtk_hal_set_phy_test_mode(struct ra_switch_ioctl_data
*data
)
761 ret
= rtk_port_phyTestMode_set(data
->port
, data
->mode
);
762 if (ret
!= RT_ERR_OK
)
763 printk("rtk_port_phyTestMode_set failed\n");
765 printk("set port%d in test mode %d.\n", data
->port
, data
->mode
);
768 void rtk_hal_set_port_trunk(struct ra_switch_ioctl_data
*data
)
772 rtk_portmask_t member
;
775 RTK_PORTMASK_CLEAR(member
);
776 for (i
= 0; i
< 4; i
++) {
777 if (data
->port_map
& (1 << i
))
778 RTK_PORTMASK_PORT_SET(member
, i
);
781 ret
= rtk_trunk_port_set(TRUNK_GROUP0
, &member
);
782 if (ret
!= RT_ERR_OK
)
783 printk("rtk_trunk_port_set failed\n");
785 ret
= rtk_trunk_distributionAlgorithm_set(RTK_WHOLE_SYSTEM
, 0x7F);
786 if (ret
!= RT_ERR_OK
)
787 printk("rtk_trunk_distributionAlgorithm_set failed\n");
790 void rtk_hal_vlan_tag(struct ra_switch_ioctl_data
*data
)
795 ret
= rtk_vlan_get(data
->vid
, &vlan
);
796 if (ret
!= RT_ERR_OK
)
797 printk("rtk_vlan_get failed\n");
799 if (data
->on_off
== 0)
800 RTK_PORTMASK_PORT_SET(vlan
.untag
, data
->port
);
802 RTK_PORTMASK_PORT_CLEAR(vlan
.untag
, data
->port
);
804 ret
= rtk_vlan_set(data
->vid
, &vlan
);
805 if (ret
!= RT_ERR_OK
)
806 printk("rtk_vlan_set failed\n");
810 void rtk_hal_vlan_mode(struct ra_switch_ioctl_data
*data
)
812 rtk_vlan_cfg_t vlan1
, vlan2
;
815 ret
= rtk_vlan_get(1, &vlan1
);
816 if (ret
!= RT_ERR_OK
)
817 printk("rtk_vlan_get failed\n");
819 ret
= rtk_vlan_get(2, &vlan2
);
820 if (ret
!= RT_ERR_OK
)
821 printk("rtk_vlan_get failed\n");
823 if (data
->mode
== 0) { //ivl
826 rtk_vlan_set(1, &vlan1
);
829 rtk_vlan_set(2, &vlan2
);
830 } else if(data
->mode
== 1) {//svl
833 rtk_vlan_set(1, &vlan1
);
836 rtk_vlan_set(2, &vlan2
);
838 printk("mode not supported\n");