target/linux/mediatek/patches/0006-soc-mediatek-Add-infracfg-misc-driver-support.patch

   1 From d6d7a7dc1b7db2e3d496bf67b30abc894edbc4bd Mon Sep 17 00:00:00 2001
   2 From: Sascha Hauer <s.hauer@pengutronix.de>
   3 Date: Tue, 9 Jun 2015 10:46:59 +0200
   4 Subject: [PATCH 06/76] soc: mediatek: Add infracfg misc driver support
   5
   6 This adds support for some miscellaneous bits of the infracfg controller.
   7 The mtk_infracfg_set/clear_bus_protection functions are necessary for
   8 the scpsys power domain driver to handle the bus protection bits which
   9 are contained in the infacfg register space.
  10
  11 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
  12 ---
  13  drivers/soc/mediatek/Kconfig          |    9 ++++
  14  drivers/soc/mediatek/Makefile         |    1 +
  15  drivers/soc/mediatek/mtk-infracfg.c   |   91 +++++++++++++++++++++++++++++++++
  16  include/linux/soc/mediatek/infracfg.h |   26 ++++++++++
  17  4 files changed, 127 insertions(+)
  18  create mode 100644 drivers/soc/mediatek/mtk-infracfg.c
  19  create mode 100644 include/linux/soc/mediatek/infracfg.h
  20
  21 diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig
  22 index 3c18503..09da41e 100644
  23 --- a/drivers/soc/mediatek/Kconfig
  24 +++ b/drivers/soc/mediatek/Kconfig
  25 @@ -1,6 +1,15 @@
  26  #
  27  # MediaTek SoC drivers
  28  #
  29 +config MTK_INFRACFG
  30 +       bool "MediaTek INFRACFG Support"
  31 +       depends on ARCH_MEDIATEK
  32 +       select REGMAP
  33 +       help
  34 +         Say yes here to add support for the MediaTek INFRACFG controller. The
  35 +         INFRACFG controller contains various infrastructure registers not
  36 +         directly associated to any device.
  37 +
  38  config MTK_PMIC_WRAP
  39         tristate "MediaTek PMIC Wrapper Support"
  40         depends on ARCH_MEDIATEK
  41 diff --git a/drivers/soc/mediatek/Makefile b/drivers/soc/mediatek/Makefile
  42 index ecaf4de..3fa940f 100644
  43 --- a/drivers/soc/mediatek/Makefile
  44 +++ b/drivers/soc/mediatek/Makefile
  45 @@ -1 +1,2 @@
  46 +obj-$(CONFIG_MTK_INFRACFG) += mtk-infracfg.o
  47  obj-$(CONFIG_MTK_PMIC_WRAP) += mtk-pmic-wrap.o
  48 diff --git a/drivers/soc/mediatek/mtk-infracfg.c b/drivers/soc/mediatek/mtk-infracfg.c
  49 new file mode 100644
  50 index 0000000..ca786e0
  51 --- /dev/null
  52 +++ b/drivers/soc/mediatek/mtk-infracfg.c
  53 @@ -0,0 +1,91 @@
  54 +/*
  55 + * Copyright (c) 2015 Pengutronix, Sascha Hauer <kernel@pengutronix.de>
  56 + *
  57 + * This program is free software; you can redistribute it and/or modify
  58 + * it under the terms of the GNU General Public License version 2 as
  59 + * published by the Free Software Foundation.
  60 + *
  61 + * This program is distributed in the hope that it will be useful,
  62 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  63 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  64 + * GNU General Public License for more details.
  65 + */
  66 +
  67 +#include <linux/export.h>
  68 +#include <linux/jiffies.h>
  69 +#include <linux/regmap.h>
  70 +#include <linux/soc/mediatek/infracfg.h>
  71 +#include <asm/processor.h>
  72 +
  73 +#define INFRA_TOPAXI_PROTECTEN         0x0220
  74 +#define INFRA_TOPAXI_PROTECTSTA1       0x0228
  75 +
  76 +/**
  77 + * mtk_infracfg_set_bus_protection - enable bus protection
  78 + * @regmap: The infracfg regmap
  79 + * @mask: The mask containing the protection bits to be enabled.
  80 + *
  81 + * This function enables the bus protection bits for disabled power
  82 + * domains so that the system does not hanf when some unit accesses the
  83 + * bus while in power down.
  84 + */
  85 +int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask)
  86 +{
  87 +       unsigned long expired;
  88 +       u32 val;
  89 +       int ret;
  90 +
  91 +       regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, mask);
  92 +
  93 +       expired = jiffies + HZ;
  94 +
  95 +       while (1) {
  96 +               ret = regmap_read(infracfg, INFRA_TOPAXI_PROTECTSTA1, &val);
  97 +               if (ret)
  98 +                       return ret;
  99 +
 100 +               if ((val & mask) == mask)
 101 +                       break;
 102 +
 103 +               cpu_relax();
 104 +               if (time_after(jiffies, expired))
 105 +                       return -EIO;
 106 +       }
 107 +
 108 +       return 0;
 109 +}
 110 +
 111 +/**
 112 + * mtk_infracfg_clear_bus_protection - disable bus protection
 113 + * @regmap: The infracfg regmap
 114 + * @mask: The mask containing the protection bits to be disabled.
 115 + *
 116 + * This function disables the bus protection bits previously enabled with
 117 + * mtk_infracfg_set_bus_protection.
 118 + */
 119 +int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask)
 120 +{
 121 +       unsigned long expired;
 122 +       int ret;
 123 +
 124 +       regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0);
 125 +
 126 +       expired = jiffies + HZ;
 127 +
 128 +       while (1) {
 129 +               u32 val;
 130 +
 131 +               ret = regmap_read(infracfg, INFRA_TOPAXI_PROTECTSTA1, &val);
 132 +               if (ret)
 133 +                       return ret;
 134 +
 135 +               if (!(val & mask))
 136 +                       break;
 137 +
 138 +               cpu_relax();
 139 +               if (time_after(jiffies, expired))
 140 +                       return -EIO;
 141 +       }
 142 +
 143 +       return 0;
 144 +}
 145 diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h
 146 new file mode 100644
 147 index 0000000..a5714e9
 148 --- /dev/null
 149 +++ b/include/linux/soc/mediatek/infracfg.h
 150 @@ -0,0 +1,26 @@
 151 +#ifndef __SOC_MEDIATEK_INFRACFG_H
 152 +#define __SOC_MEDIATEK_INFRACFG_H
 153 +
 154 +#define MT8173_TOP_AXI_PROT_EN_MCI_M2          BIT(0)
 155 +#define MT8173_TOP_AXI_PROT_EN_MM_M0           BIT(1)
 156 +#define MT8173_TOP_AXI_PROT_EN_MM_M1           BIT(2)
 157 +#define MT8173_TOP_AXI_PROT_EN_MMAPB_S         BIT(6)
 158 +#define MT8173_TOP_AXI_PROT_EN_L2C_M2          BIT(9)
 159 +#define MT8173_TOP_AXI_PROT_EN_L2SS_SMI                BIT(11)
 160 +#define MT8173_TOP_AXI_PROT_EN_L2SS_ADD                BIT(12)
 161 +#define MT8173_TOP_AXI_PROT_EN_CCI_M2          BIT(13)
 162 +#define MT8173_TOP_AXI_PROT_EN_MFG_S           BIT(14)
 163 +#define MT8173_TOP_AXI_PROT_EN_PERI_M0         BIT(15)
 164 +#define MT8173_TOP_AXI_PROT_EN_PERI_M1         BIT(16)
 165 +#define MT8173_TOP_AXI_PROT_EN_DEBUGSYS                BIT(17)
 166 +#define MT8173_TOP_AXI_PROT_EN_CQ_DMA          BIT(18)
 167 +#define MT8173_TOP_AXI_PROT_EN_GCPU            BIT(19)
 168 +#define MT8173_TOP_AXI_PROT_EN_IOMMU           BIT(20)
 169 +#define MT8173_TOP_AXI_PROT_EN_MFG_M0          BIT(21)
 170 +#define MT8173_TOP_AXI_PROT_EN_MFG_M1          BIT(22)
 171 +#define MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT   BIT(23)
 172 +
 173 +int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask);
 174 +int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask);
 175 +
 176 +#endif /* __SOC_MEDIATEK_INFRACFG_H */
 177 --
 178 1.7.10.4
 179