target/linux/mediatek/patches/0034-mmc-dt-bindings-add-Mediatek-MMC-bindings.patch

   1 From fe43da8836dbf8e48377d208000877a17e465f3f Mon Sep 17 00:00:00 2001
   2 From: Chaotian Jing <chaotian.jing@mediatek.com>
   3 Date: Mon, 15 Jun 2015 19:20:47 +0800
   4 Subject: [PATCH 34/76] mmc: dt-bindings: add Mediatek MMC bindings
   5
   6 Document the device-tree binding of Mediatek MMC host
   7
   8 Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
   9 ---
  10  Documentation/devicetree/bindings/mmc/mtk-sd.txt |   32 ++++++++++++++++++++++
  11  1 file changed, 32 insertions(+)
  12  create mode 100644 Documentation/devicetree/bindings/mmc/mtk-sd.txt
  13
  14 diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
  15 new file mode 100644
  16 index 0000000..a1adfa4
  17 --- /dev/null
  18 +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
  19 @@ -0,0 +1,32 @@
  20 +* MTK MMC controller
  21 +
  22 +The MTK  MSDC can act as a MMC controller
  23 +to support MMC, SD, and SDIO types of memory cards.
  24 +
  25 +This file documents differences between the core properties in mmc.txt
  26 +and the properties used by the msdc driver.
  27 +
  28 +Required properties:
  29 +- compatible: Should be "mediatek,mt8173-mmc","mediatek,mt8135-mmc"
  30 +- interrupts: Should contain MSDC interrupt number
  31 +- clocks: MSDC source clock, HCLK
  32 +- clock-names: "source", "hclk"
  33 +- pinctrl-names: should be "default", "state_uhs"
  34 +- pinctrl-0: should contain default/high speed pin ctrl
  35 +- pinctrl-1: should contain uhs mode pin ctrl
  36 +- vmmc-supply: power to the Core
  37 +- vqmmc-supply: power to the IO
  38 +
  39 +Examples:
  40 +mmc0: mmc@11230000 {
  41 +       compatible = "mediatek,mt8173-mmc", "mediatek,mt8135-mmc";
  42 +       reg = <0 0x11230000 0 0x108>;
  43 +       interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_LOW>;
  44 +       vmmc-supply = <&mt6397_vemc_3v3_reg>;
  45 +       vqmmc-supply = <&mt6397_vio18_reg>;
  46 +       clocks = <&pericfg CLK_PERI_MSDC30_0>, <&topckgen CLK_TOP_MSDC50_0_H_SEL>;
  47 +       clock-names = "source", "hclk";
  48 +       pinctrl-names = "default", "state_uhs";
  49 +       pinctrl-0 = <&mmc0_pins_default>;
  50 +       pinctrl-1 = <&mmc0_pins_uhs>;
  51 +};
  52 --
  53 1.7.10.4
  54