1 From 0c88c72bf130c9276958dc6f595ea473ea357a75 Mon Sep 17 00:00:00 2001
2 From: Kristian Evensen <kristian.evensen@gmail.com>
3 Date: Sun, 17 Jun 2018 14:41:47 +0200
4 Subject: [PATCH] arm: dts: Add Unielec U7623 DTS
7 arch/arm/boot/dts/Makefile | 1 +
8 .../dts/mt7623a-unielec-u7623-02-emmc-512M.dts | 17 +
9 .../boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi | 374 +++++++++++++++++++++
10 3 files changed, 392 insertions(+)
11 create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512M.dts
12 create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
14 --- a/arch/arm/boot/dts/Makefile
15 +++ b/arch/arm/boot/dts/Makefile
16 @@ -1062,6 +1062,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
19 mt7623a-rfb-emmc.dtb \
20 + mt7623a-unielec-u7623-02-emmc-512M.dtb \
21 mt7623n-rfb-nand.dtb \
22 mt7623n-bananapi-bpi-r2.dtb \
25 +++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512M.dts
28 + * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
30 + * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
34 +#include "mt7623a-unielec-u7623-02-emmc.dtsi"
37 + model = "UniElec U7623-02 eMMC (512M RAM)";
38 + compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02-emmc", "mediatek,mt7623";
41 + reg = <0 0x80000000 0 0x20000000>;
45 +++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
48 + * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
50 + * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
53 +#include <dt-bindings/input/input.h>
54 +#include "mt7623.dtsi"
55 +#include "mt6323.dtsi"
58 + compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
65 + bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs";
66 + stdout-path = "serial2:115200n8";
70 + reg = <0 0x80000000 0 0x20000000>;
75 + proc-supply = <&mt6323_vproc_reg>;
79 + proc-supply = <&mt6323_vproc_reg>;
83 + proc-supply = <&mt6323_vproc_reg>;
87 + proc-supply = <&mt6323_vproc_reg>;
91 + reg_1p8v: regulator-1p8v {
92 + compatible = "regulator-fixed";
93 + regulator-name = "fixed-1.8V";
94 + regulator-min-microvolt = <1800000>;
95 + regulator-max-microvolt = <1800000>;
97 + regulator-always-on;
100 + reg_3p3v: regulator-3p3v {
101 + compatible = "regulator-fixed";
102 + regulator-name = "fixed-3.3V";
103 + regulator-min-microvolt = <3300000>;
104 + regulator-max-microvolt = <3300000>;
106 + regulator-always-on;
109 + reg_5v: regulator-5v {
110 + compatible = "regulator-fixed";
111 + regulator-name = "fixed-5V";
112 + regulator-min-microvolt = <5000000>;
113 + regulator-max-microvolt = <5000000>;
115 + regulator-always-on;
119 + compatible = "gpio-keys";
120 + pinctrl-names = "default";
121 + pinctrl-0 = <&key_pins_a>;
125 + linux,code = <KEY_RESTART>;
126 + gpios = <&pio 256 GPIO_ACTIVE_LOW>;
131 + compatible = "gpio-leds";
132 + pinctrl-names = "default";
133 + pinctrl-0 = <&led_pins_unielec>;
136 + label = "u7623-01:green:led3";
137 + gpios = <&pio 14 GPIO_ACTIVE_LOW>;
138 + default-state = "off";
142 + label = "u7623-01:green:led4";
143 + gpios = <&pio 15 GPIO_ACTIVE_LOW>;
144 + default-state = "off";
149 + reg = <0 0x80000000 0 0x40000000>;
153 + compatible = "mediatek,mt7530";
154 + #address-cells = <1>;
167 + compatible = "mediatek,eth-mac";
169 + phy-mode = "trgmii";
179 + #address-cells = <1>;
181 + phy5: ethernet-phy@5 {
183 + phy-mode = "rgmii-rxid";
189 + compatible = "mediatek,mt7530";
190 + #address-cells = <1>;
193 + pinctrl-names = "default";
195 + resets = <ðsys 2>;
196 + reset-names = "mcm";
197 + core-supply = <&mt6323_vpa_reg>;
198 + io-supply = <&mt6323_vemc3v3_reg>;
200 + dsa,mii-bus = <&mdio>;
203 + #address-cells = <1>;
210 + cpu = <&cpu_port0>;
216 + cpu = <&cpu_port0>;
222 + cpu = <&cpu_port0>;
228 + cpu = <&cpu_port0>;
234 + cpu = <&cpu_port0>;
237 + cpu_port0: port@6 {
240 + ethernet = <&gmac0>;
241 + phy-mode = "trgmii";
252 + pinctrl-names = "default", "state_uhs";
253 + pinctrl-0 = <&mmc0_pins_default>;
254 + pinctrl-1 = <&mmc0_pins_uhs>;
257 + max-frequency = <50000000>;
259 + vmmc-supply = <®_3p3v>;
260 + vqmmc-supply = <®_1p8v>;
265 + key_pins_a: keys-alt {
267 + pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
268 + <MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
273 + led_pins_unielec: leds-unielec {
275 + pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
276 + <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
280 + mmc0_pins_default: mmc0default {
282 + pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
283 + <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
284 + <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
285 + <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
286 + <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
287 + <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
288 + <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
289 + <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
290 + <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
296 + pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
301 + pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
306 + mmc0_pins_uhs: mmc0 {
308 + pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
309 + <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
310 + <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
311 + <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
312 + <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
313 + <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
314 + <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
315 + <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
316 + <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
318 + drive-strength = <MTK_DRIVE_2mA>;
319 + bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
323 + pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
324 + drive-strength = <MTK_DRIVE_2mA>;
325 + bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
329 + pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
334 + pwm_pins_a: pwm@0 {
336 + pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
337 + <MT7623_PIN_204_PWM1_FUNC_PWM1>,
338 + <MT7623_PIN_205_PWM2_FUNC_PWM2>,
339 + <MT7623_PIN_206_PWM3_FUNC_PWM3>,
340 + <MT7623_PIN_207_PWM4_FUNC_PWM4>;
344 + uart2_pins_b: uart@2 {
346 + pinmux = <MT7623_PIN_200_URXD2_FUNC_URXD2>,
347 + <MT7623_PIN_201_UTXD2_FUNC_UTXD2>;
351 + pcie_default: pcie_pin_default {
353 + pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
354 + <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
361 + pinctrl-names = "default";
362 + pinctrl-0 = <&pwm_pins_a>;
369 + compatible = "mediatek,mt6323-led";
370 + #address-cells = <1>;
376 + default-state = "off";
383 + pinctrl-names = "default";
384 + pinctrl-0 = <&uart2_pins_b>;
389 + vusb33-supply = <®_3p3v>;
390 + vbus-supply = <®_3p3v>;
400 + mediatek,phy-switch = <&hifsys>;
404 + pinctrl-names = "default";
405 + pinctrl-0 = <&pcie_default>;