1 From c813fbe806257c574240770ef716fbee19f7dbfa Mon Sep 17 00:00:00 2001
2 From: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
3 Date: Thu, 6 Jun 2019 16:29:04 +0800
4 Subject: [PATCH] spi: spi-mem: Mediatek: Add SPI Nand support for MT7629
6 Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
8 arch/arm/boot/dts/mt7629-rfb.dts | 45 ++++++++++++++++++++++++++++++++
9 arch/arm/boot/dts/mt7629-lynx-rfb.dts | 45 ++++++++++++++++++++++++++++++++
10 arch/arm/boot/dts/mt7629.dtsi | 22 ++++++++++++++++
11 drivers/spi/spi-mtk-snfi.c | 12 +++++++++
12 3 files changed, 79 insertions(+)
14 --- a/arch/arm/boot/dts/mt7629-rfb.dts
15 +++ b/arch/arm/boot/dts/mt7629-rfb.dts
25 + pinctrl-names = "default";
26 + pinctrl-0 = <&serial_nand_pins>;
30 + #address-cells = <1>;
32 + compatible = "spi-nand";
33 + spi-max-frequency = <104000000>;
37 + compatible = "fixed-partitions";
38 + #address-cells = <1>;
42 + label = "Bootloader";
43 + reg = <0x00000 0x0100000>;
49 + reg = <0x100000 0x0040000>;
54 + reg = <0x140000 0x0080000>;
59 + reg = <0x1c0000 0x1000000>;
66 pinctrl-names = "default";
67 pinctrl-0 = <&spi_pins>;
68 --- a/arch/arm/boot/dts/mt7629.dtsi
69 +++ b/arch/arm/boot/dts/mt7629.dtsi
75 + compatible = "mediatek,mt7622-ecc";
76 + reg = <0x1100e000 0x1000>;
77 + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>;
78 + clocks = <&pericfg CLK_PERI_NFIECC_PD>;
79 + clock-names = "nfiecc_clk";
80 + status = "disabled";
83 + snfi: spi@1100d000 {
84 + compatible = "mediatek,mt7629-snfi";
85 + reg = <0x1100d000 0x1000>;
86 + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
87 + clocks = <&pericfg CLK_PERI_NFI_PD>,
88 + <&pericfg CLK_PERI_SNFI_PD>;
89 + clock-names = "nfi_clk", "spi_clk";
90 + ecc-engine = <&bch>;
91 + #address-cells = <1>;
93 + status = "disabled";
97 compatible = "mediatek,mt7629-spi",
98 "mediatek,mt7622-spi";
99 --- a/drivers/spi/spi-mtk-snfi.c
100 +++ b/drivers/spi/spi-mtk-snfi.c
101 @@ -1029,8 +1029,20 @@ static const struct mtk_snfi_caps snfi_m
105 +static const struct mtk_snfi_caps snfi_mt7629 = {
106 + .spare_size = spare_size_mt7622,
107 + .num_spare_size = 4,
108 + .nand_sec_size = 512,
109 + .nand_fdm_size = 8,
110 + .nand_fdm_ecc_size = 1,
111 + .ecc_parity_bits = 13,
112 + .pageformat_spare_shift = 4,
113 + .bad_mark_swap = 1,
116 static const struct of_device_id mtk_snfi_id_table[] = {
117 { .compatible = "mediatek,mt7622-snfi", .data = &snfi_mt7622, },
118 + { .compatible = "mediatek,mt7629-snfi", .data = &snfi_mt7629, },
122 --- a/arch/arm/boot/dts/mt7629-lynx-rfb.dts
123 +++ b/arch/arm/boot/dts/mt7629-lynx-rfb.dts
133 + pinctrl-names = "default";
134 + pinctrl-0 = <&serial_nand_pins>;
138 + #address-cells = <1>;
140 + compatible = "spi-nand";
141 + spi-max-frequency = <104000000>;
145 + compatible = "fixed-partitions";
146 + #address-cells = <1>;
150 + label = "Bootloader";
151 + reg = <0x00000 0x0100000>;
157 + reg = <0x100000 0x0040000>;
162 + reg = <0x140000 0x0080000>;
166 + label = "firmware";
167 + reg = <0x1c0000 0x1000000>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&spi_pins>;