target/linux/mediatek/patches-5.10/000-spi-fix-fifo.patch

   1 From 3a70dd2d050331ee4cf5ad9d5c0a32d83ead9a43 Mon Sep 17 00:00:00 2001
   2 From: Peter Hess <peter.hess@ph-home.de>
   3 Date: Tue, 6 Jul 2021 14:16:09 +0200
   4 Subject: spi: mediatek: fix fifo rx mode
   5
   6 In FIFO mode were two problems:
   7 - RX mode was never handled and
   8 - in this case the tx_buf pointer was NULL and caused an exception
   9
  10 fix this by handling RX mode in mtk_spi_fifo_transfer
  11
  12 Fixes: a568231f4632 ("spi: mediatek: Add spi bus for Mediatek MT8173")
  13 Signed-off-by: Peter Hess <peter.hess@ph-home.de>
  14 Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
  15 Link: https://lore.kernel.org/r/20210706121609.680534-1-linux@fw-web.de
  16 Signed-off-by: Mark Brown <broonie@kernel.org>
  17 ---
  18  drivers/spi/spi-mt65xx.c | 16 +++++++++++++---
  19  1 file changed, 13 insertions(+), 3 deletions(-)
  20
  21 diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
  22 index 976f73b9e2998..8d5fa7f1e5069 100644
  23 --- a/drivers/spi/spi-mt65xx.c
  24 +++ b/drivers/spi/spi-mt65xx.c
  25 @@ -427,13 +427,23 @@ static int mtk_spi_fifo_transfer(struct spi_master *master,
  26         mtk_spi_setup_packet(master);
  27
  28         cnt = xfer->len / 4;
  29 -       iowrite32_rep(mdata->base + SPI_TX_DATA_REG, xfer->tx_buf, cnt);
  30 +       if (xfer->tx_buf)
  31 +               iowrite32_rep(mdata->base + SPI_TX_DATA_REG, xfer->tx_buf, cnt);
  32 +
  33 +       if (xfer->rx_buf)
  34 +               ioread32_rep(mdata->base + SPI_RX_DATA_REG, xfer->rx_buf, cnt);
  35
  36         remainder = xfer->len % 4;
  37         if (remainder > 0) {
  38                 reg_val = 0;
  39 -               memcpy(&reg_val, xfer->tx_buf + (cnt * 4), remainder);
  40 -               writel(reg_val, mdata->base + SPI_TX_DATA_REG);
  41 +               if (xfer->tx_buf) {
  42 +                       memcpy(&reg_val, xfer->tx_buf + (cnt * 4), remainder);
  43 +                       writel(reg_val, mdata->base + SPI_TX_DATA_REG);
  44 +               }
  45 +               if (xfer->rx_buf) {
  46 +                       reg_val = readl(mdata->base + SPI_RX_DATA_REG);
  47 +                       memcpy(xfer->rx_buf + (cnt * 4), &reg_val, remainder);
  48 +               }
  49         }
  50
  51         mtk_spi_enable_transfer(master);
  52 --
  53 cgit 1.2.3-1.el7
  54