1 From c813fbe806257c574240770ef716fbee19f7dbfa Mon Sep 17 00:00:00 2001
2 From: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
3 Date: Thu, 6 Jun 2019 16:29:04 +0800
4 Subject: [PATCH] spi: spi-mem: Mediatek: Add SPI Nand support for MT7629
6 Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
8 arch/arm/boot/dts/mt7629-rfb.dts | 45 ++++++++++++++++++++++++++++++++
9 arch/arm/boot/dts/mt7629.dtsi | 22 ++++++++++++++++
10 3 files changed, 79 insertions(+)
12 --- a/arch/arm/boot/dts/mt7629.dtsi
13 +++ b/arch/arm/boot/dts/mt7629.dtsi
19 + compatible = "mediatek,mt7622-ecc";
20 + reg = <0x1100e000 0x1000>;
21 + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>;
22 + clocks = <&pericfg CLK_PERI_NFIECC_PD>;
23 + clock-names = "nfiecc_clk";
24 + status = "disabled";
27 + snfi: spi@1100d000 {
28 + compatible = "mediatek,mt7629-snfi";
29 + reg = <0x1100d000 0x1000>;
30 + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
31 + clocks = <&pericfg CLK_PERI_NFI_PD>,
32 + <&pericfg CLK_PERI_SNFI_PD>;
33 + clock-names = "nfi_clk", "spi_clk";
34 + ecc-engine = <&bch>;
35 + #address-cells = <1>;
37 + status = "disabled";
41 compatible = "mediatek,mt7629-spi",
42 "mediatek,mt7622-spi";
43 --- a/arch/arm/boot/dts/mt7629-rfb.dts
44 +++ b/arch/arm/boot/dts/mt7629-rfb.dts
54 + pinctrl-names = "default";
55 + pinctrl-0 = <&serial_nand_pins>;
59 + #address-cells = <1>;
61 + compatible = "spi-nand";
62 + spi-max-frequency = <104000000>;
66 + compatible = "fixed-partitions";
67 + #address-cells = <1>;
71 + label = "Bootloader";
72 + reg = <0x00000 0x0100000>;
78 + reg = <0x100000 0x0040000>;
83 + reg = <0x140000 0x0080000>;
88 + reg = <0x1c0000 0x1000000>;
96 pinctrl-names = "default";
97 pinctrl-0 = <&spi_pins>;