target/linux/mediatek/patches-5.10/173-arm-dts-mt7623-add-musb-device-nodes.patch

   1 From 21d106f15262f5a2ef7531636e0703ee61c33c61 Mon Sep 17 00:00:00 2001
   2 From: Sungbo Eo <mans0n@gorani.run>
   3 Date: Sun, 8 Aug 2021 21:38:40 +0900
   4 Subject: [PATCH 2/2] arm: dts: mt7623: add musb device nodes
   5
   6 MT7623 has an musb controller that is compatible with the one from MT2701.
   7
   8 Signed-off-by: Sungbo Eo <mans0n@gorani.run>
   9 ---
  10  arch/arm/boot/dts/mt7623.dtsi  | 34 ++++++++++++++++++++++++++++++++++
  11  arch/arm/boot/dts/mt7623a.dtsi |  4 ++++
  12  2 files changed, 38 insertions(+)
  13
  14 diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
  15 index 3c11f7cfcc401..790d74439cc66 100644
  16 --- a/arch/arm/boot/dts/mt7623.dtsi
  17 +++ b/arch/arm/boot/dts/mt7623.dtsi
  18 @@ -585,6 +585,40 @@ spi2: spi@11017000 {
  19                 status = "disabled";
  20         };
  21
  22 +       usb0: usb@11200000 {
  23 +               compatible = "mediatek,mt7623-musb",
  24 +                            "mediatek,mtk-musb";
  25 +               reg = <0 0x11200000 0 0x1000>;
  26 +               interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
  27 +               interrupt-names = "mc";
  28 +               phys = <&u2port2 PHY_TYPE_USB2>;
  29 +               dr_mode = "otg";
  30 +               clocks = <&pericfg CLK_PERI_USB0>,
  31 +                        <&pericfg CLK_PERI_USB0_MCU>,
  32 +                        <&pericfg CLK_PERI_USB_SLV>;
  33 +               clock-names = "main","mcu","univpll";
  34 +               power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
  35 +               status = "disabled";
  36 +       };
  37 +
  38 +       u2phy1: t-phy@11210000 {
  39 +               compatible = "mediatek,mt7623-tphy",
  40 +                            "mediatek,generic-tphy-v1";
  41 +               reg = <0 0x11210000 0 0x0800>;
  42 +               #address-cells = <2>;
  43 +               #size-cells = <2>;
  44 +               ranges;
  45 +               status = "disabled";
  46 +
  47 +               u2port2: usb-phy@11210800 {
  48 +                       reg = <0 0x11210800 0 0x0100>;
  49 +                       clocks = <&topckgen CLK_TOP_USB_PHY48M>;
  50 +                       clock-names = "ref";
  51 +                       #phy-cells = <1>;
  52 +                       status = "okay";
  53 +               };
  54 +       };
  55 +
  56         audsys: clock-controller@11220000 {
  57                 compatible = "mediatek,mt7623-audsys",
  58                              "mediatek,mt2701-audsys",
  59 diff --git a/arch/arm/boot/dts/mt7623a.dtsi b/arch/arm/boot/dts/mt7623a.dtsi
  60 index 0735a1fb8ad9a..d304b62d24b58 100644
  61 --- a/arch/arm/boot/dts/mt7623a.dtsi
  62 +++ b/arch/arm/boot/dts/mt7623a.dtsi
  63 @@ -35,6 +35,10 @@ &scpsys {
  64         clock-names = "ethif";
  65  };
  66
  67 +&usb0 {
  68 +       power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
  69 +};
  70 +
  71  &usb1 {
  72         power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>;
  73  };
  74 --
  75 2.32.0
  76