target/linux/mediatek/patches-5.10/900-dts-mt7622-bpi-r64-aliases-for-dtoverlay.patch

   1 --- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
   2 +++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
   3 @@ -279,14 +279,14 @@
   4  &pcie1 {
   5         pinctrl-names = "default";
   6         pinctrl-0 = <&pcie1_pins>;
   7 -       status = "okay";
   8 +       status = "disabled";
   9  };
  10
  11  &pio {
  12         /* Attention: GPIO 90 is used to switch between PCIe@1,0 and
  13          * SATA functions. i.e. output-high: PCIe, output-low: SATA
  14          */
  15 -       asm_sel {
  16 +       asmsel: asm_sel {
  17                 gpio-hog;
  18                 gpios = <90 GPIO_ACTIVE_HIGH>;
  19                 output-high;
  20 --- /dev/null
  21 +++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64-sata.dts
  22 @@ -0,0 +1,31 @@
  23 +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
  24 +
  25 +#include <dt-bindings/gpio/gpio.h>
  26 +
  27 +/dts-v1/;
  28 +/plugin/;
  29 +
  30 +/ {
  31 +       compatible = "bananapi,bpi-r64", "mediatek,mt7622";
  32 +
  33 +       fragment@0 {
  34 +               target = <&asmsel>;
  35 +               __overlay__ {
  36 +                       gpios = <90 GPIO_ACTIVE_LOW>;
  37 +               };
  38 +       };
  39 +
  40 +       fragment@1 {
  41 +               target = <&sata>;
  42 +               __overlay__ {
  43 +                       status = "okay";
  44 +               };
  45 +       };
  46 +
  47 +       fragment@2 {
  48 +               target = <&sata_phy>;
  49 +               __overlay__ {
  50 +                       status = "okay";
  51 +               };
  52 +       };
  53 +};
  54 --- /dev/null
  55 +++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64-pcie1.dts
  56 @@ -0,0 +1,24 @@
  57 +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
  58 +
  59 +#include <dt-bindings/gpio/gpio.h>
  60 +
  61 +/dts-v1/;
  62 +/plugin/;
  63 +
  64 +/ {
  65 +       compatible = "bananapi,bpi-r64", "mediatek,mt7622";
  66 +
  67 +       fragment@0 {
  68 +               target = <&asmsel>;
  69 +               __overlay__ {
  70 +                       gpios = <90 GPIO_ACTIVE_HIGH>;
  71 +               };
  72 +       };
  73 +
  74 +       fragment@1 {
  75 +               target = <&pcie1>;
  76 +               __overlay__ {
  77 +                       status = "okay";
  78 +               };
  79 +       };
  80 +};