target/linux/mediatek/patches-5.4/0227-arm-dts-Add-Unielec-U7623-DTS.patch

   1 From 004eb24e939b5b31f828333f37fb5cb2a877d6f2 Mon Sep 17 00:00:00 2001
   2 From: Kristian Evensen <kristian.evensen@gmail.com>
   3 Date: Sun, 17 Jun 2018 14:41:47 +0200
   4 Subject: [PATCH] arm: dts: Add Unielec U7623 DTS
   5
   6 ---
   7  arch/arm/boot/dts/Makefile                         |   1 +
   8  .../dts/mt7623a-unielec-u7623-02-emmc-512m.dts     |  18 +
   9  .../boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi    | 366 +++++++++++++++++++++
  10  3 files changed, 385 insertions(+)
  11  create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512m.dts
  12  create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
  13
  14 --- a/arch/arm/boot/dts/Makefile
  15 +++ b/arch/arm/boot/dts/Makefile
  16 @@ -1272,6 +1272,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
  17         mt7623a-rfb-nand.dtb \
  18         mt7623n-rfb-emmc.dtb \
  19         mt7623n-bananapi-bpi-r2.dtb \
  20 +       mt7623a-unielec-u7623-02-emmc-512m.dtb \
  21         mt7629-rfb.dtb \
  22         mt8127-moose.dtb \
  23         mt8135-evbp1.dtb
  24 --- /dev/null
  25 +++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512m.dts
  26 @@ -0,0 +1,18 @@
  27 +/*
  28 + * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
  29 + *
  30 + * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  31 + */
  32 +
  33 +/dts-v1/;
  34 +#include "mt7623a-unielec-u7623-02-emmc.dtsi"
  35 +
  36 +/ {
  37 +       model = "UniElec U7623-02 eMMC (512M RAM)";
  38 +       compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02-emmc", "mediatek,mt7623";
  39 +
  40 +       memory@80000000 {
  41 +               device_type = "memory";
  42 +               reg = <0 0x80000000 0 0x20000000>;
  43 +       };
  44 +};
  45 --- /dev/null
  46 +++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
  47 @@ -0,0 +1,343 @@
  48 +/*
  49 + * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
  50 + *
  51 + * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  52 + */
  53 +
  54 +#include <dt-bindings/input/input.h>
  55 +#include "mt7623.dtsi"
  56 +#include "mt6323.dtsi"
  57 +
  58 +/ {
  59 +       compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
  60 +
  61 +       aliases {
  62 +               serial2 = &uart2;
  63 +       };
  64 +
  65 +       chosen {
  66 +               bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs console=ttyS0,115200 blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root)";
  67 +               stdout-path = "serial2:115200n8";
  68 +       };
  69 +
  70 +       cpus {
  71 +               cpu@0 {
  72 +                       proc-supply = <&mt6323_vproc_reg>;
  73 +               };
  74 +
  75 +               cpu@1 {
  76 +                       proc-supply = <&mt6323_vproc_reg>;
  77 +               };
  78 +
  79 +               cpu@2 {
  80 +                       proc-supply = <&mt6323_vproc_reg>;
  81 +               };
  82 +
  83 +               cpu@3 {
  84 +                       proc-supply = <&mt6323_vproc_reg>;
  85 +               };
  86 +       };
  87 +
  88 +       reg_1p8v: regulator-1p8v {
  89 +               compatible = "regulator-fixed";
  90 +               regulator-name = "fixed-1.8V";
  91 +               regulator-min-microvolt = <1800000>;
  92 +               regulator-max-microvolt = <1800000>;
  93 +               regulator-boot-on;
  94 +               regulator-always-on;
  95 +       };
  96 +
  97 +       reg_3p3v: regulator-3p3v {
  98 +               compatible = "regulator-fixed";
  99 +               regulator-name = "fixed-3.3V";
 100 +               regulator-min-microvolt = <3300000>;
 101 +               regulator-max-microvolt = <3300000>;
 102 +               regulator-boot-on;
 103 +               regulator-always-on;
 104 +       };
 105 +
 106 +       reg_5v: regulator-5v {
 107 +               compatible = "regulator-fixed";
 108 +               regulator-name = "fixed-5V";
 109 +               regulator-min-microvolt = <5000000>;
 110 +               regulator-max-microvolt = <5000000>;
 111 +               regulator-boot-on;
 112 +               regulator-always-on;
 113 +       };
 114 +
 115 +       gpio-keys {
 116 +               compatible = "gpio-keys";
 117 +               pinctrl-names = "default";
 118 +               pinctrl-0 = <&key_pins_a>;
 119 +
 120 +               factory {
 121 +                       label = "factory";
 122 +                       linux,code = <KEY_RESTART>;
 123 +                       gpios = <&pio 256 GPIO_ACTIVE_LOW>;
 124 +               };
 125 +       };
 126 +
 127 +       leds {
 128 +               compatible = "gpio-leds";
 129 +               pinctrl-names = "default";
 130 +               pinctrl-0 = <&led_pins_unielec>;
 131 +
 132 +               led3 {
 133 +                       label = "u7623-01:green:led3";
 134 +                       gpios = <&pio 14 GPIO_ACTIVE_LOW>;
 135 +                       default-state = "off";
 136 +               };
 137 +
 138 +               led4 {
 139 +                       label = "u7623-01:green:led4";
 140 +                       gpios = <&pio 15 GPIO_ACTIVE_LOW>;
 141 +                       default-state = "off";
 142 +               };
 143 +       };
 144 +};
 145 +
 146 +&crypto {
 147 +       status = "okay";
 148 +};
 149 +
 150 +&eth {
 151 +       status = "okay";
 152 +
 153 +       gmac0: mac@0 {
 154 +               compatible = "mediatek,eth-mac";
 155 +               reg = <0>;
 156 +               phy-mode = "trgmii";
 157 +
 158 +               fixed-link {
 159 +                       speed = <1000>;
 160 +                       full-duplex;
 161 +                       pause;
 162 +               };
 163 +       };
 164 +
 165 +       mdio: mdio-bus {
 166 +               #address-cells = <1>;
 167 +               #size-cells = <0>;
 168 +
 169 +               mt7530: switch@0 {
 170 +                       compatible = "mediatek,mt7530";
 171 +               };
 172 +       };
 173 +};
 174 +
 175 +&mt7530 {
 176 +       compatible = "mediatek,mt7530";
 177 +       #address-cells = <1>;
 178 +       #size-cells = <0>;
 179 +       reg = <0>;
 180 +       pinctrl-names = "default";
 181 +       mediatek,mcm;
 182 +       resets = <&ethsys 2>;
 183 +       reset-names = "mcm";
 184 +       core-supply = <&mt6323_vpa_reg>;
 185 +       io-supply = <&mt6323_vemc3v3_reg>;
 186 +
 187 +       dsa,mii-bus = <&mdio>;
 188 +
 189 +       ports {
 190 +               #address-cells = <1>;
 191 +               #size-cells = <0>;
 192 +               reg = <0>;
 193 +
 194 +               port@0 {
 195 +                       reg = <0>;
 196 +                       label = "lan0";
 197 +                       cpu = <&cpu_port0>;
 198 +               };
 199 +
 200 +               port@1 {
 201 +                       reg = <1>;
 202 +                       label = "lan1";
 203 +                       cpu = <&cpu_port0>;
 204 +               };
 205 +
 206 +               port@2 {
 207 +                       reg = <2>;
 208 +                       label = "lan2";
 209 +                       cpu = <&cpu_port0>;
 210 +               };
 211 +
 212 +               port@3 {
 213 +                       reg = <3>;
 214 +                       label = "lan3";
 215 +                       cpu = <&cpu_port0>;
 216 +               };
 217 +
 218 +               port@4 {
 219 +                       reg = <4>;
 220 +                       label = "wan";
 221 +                       cpu = <&cpu_port0>;
 222 +               };
 223 +
 224 +               cpu_port0: port@6 {
 225 +                       reg = <6>;
 226 +                       label = "cpu";
 227 +                       ethernet = <&gmac0>;
 228 +                       phy-mode = "trgmii";
 229 +
 230 +                       fixed-link {
 231 +                               speed = <1000>;
 232 +                               full-duplex;
 233 +                       };
 234 +               };
 235 +       };
 236 +};
 237 +
 238 +&mmc0 {
 239 +       pinctrl-names = "default", "state_uhs";
 240 +       pinctrl-0 = <&mmc0_pins_default>;
 241 +       pinctrl-1 = <&mmc0_pins_uhs>;
 242 +       status = "okay";
 243 +       bus-width = <8>;
 244 +       max-frequency = <50000000>;
 245 +       cap-mmc-highspeed;
 246 +       vmmc-supply = <&reg_3p3v>;
 247 +       vqmmc-supply = <&reg_1p8v>;
 248 +       non-removable;
 249 +};
 250 +
 251 +&pio {
 252 +       key_pins_a: keys-alt {
 253 +               pins-keys {
 254 +                       pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
 255 +                                <MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
 256 +                       input-enable;
 257 +               };
 258 +       };
 259 +
 260 +       led_pins_unielec: leds-unielec {
 261 +               pins-leds {
 262 +                       pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
 263 +                                <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
 264 +               };
 265 +       };
 266 +
 267 +       mmc0_pins_default: mmc0default {
 268 +               pins_cmd_dat {
 269 +                       pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
 270 +                                <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
 271 +                                <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
 272 +                                <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
 273 +                                <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
 274 +                                <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
 275 +                                <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
 276 +                                <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
 277 +                                <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
 278 +                       input-enable;
 279 +                       bias-pull-up;
 280 +               };
 281 +
 282 +               pins_clk {
 283 +                       pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
 284 +                       bias-pull-down;
 285 +               };
 286 +
 287 +               pins_rst {
 288 +                       pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
 289 +                       bias-pull-up;
 290 +               };
 291 +       };
 292 +
 293 +       mmc0_pins_uhs: mmc0 {
 294 +               pins_cmd_dat {
 295 +                       pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
 296 +                                <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
 297 +                                <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
 298 +                                <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
 299 +                                <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
 300 +                                <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
 301 +                                <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
 302 +                                <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
 303 +                                <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
 304 +                       input-enable;
 305 +                       drive-strength = <MTK_DRIVE_2mA>;
 306 +                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 307 +               };
 308 +
 309 +               pins_clk {
 310 +                       pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
 311 +                       drive-strength = <MTK_DRIVE_2mA>;
 312 +                       bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
 313 +               };
 314 +
 315 +               pins_rst {
 316 +                       pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
 317 +                       bias-pull-up;
 318 +               };
 319 +       };
 320 +
 321 +       pcie_default: pcie_pin_default {
 322 +               pins_cmd_dat {
 323 +                       pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
 324 +                                <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
 325 +                       bias-disable;
 326 +               };
 327 +       };
 328 +};
 329 +
 330 +&pwm {
 331 +       pinctrl-names = "default";
 332 +       pinctrl-0 = <&pwm_pins_a>;
 333 +       status = "okay";
 334 +};
 335 +
 336 +&pwrap {
 337 +       mt6323 {
 338 +               mt6323led: led {
 339 +                       compatible = "mediatek,mt6323-led";
 340 +                       #address-cells = <1>;
 341 +                       #size-cells = <0>;
 342 +
 343 +                       led@0 {
 344 +                               reg = <0>;
 345 +                               label = "led0";
 346 +                               default-state = "off";
 347 +                       };
 348 +               };
 349 +       };
 350 +};
 351 +
 352 +&uart2 {
 353 +       pinctrl-names = "default";
 354 +       pinctrl-0 = <&uart2_pins_b>;
 355 +       status = "okay";
 356 +};
 357 +
 358 +&usb1 {
 359 +       vusb33-supply = <&reg_3p3v>;
 360 +       vbus-supply = <&reg_3p3v>;
 361 +       status = "okay";
 362 +};
 363 +
 364 +&u3phy1 {
 365 +       status = "okay";
 366 +};
 367 +
 368 +&u3phy2 {
 369 +       status = "okay";
 370 +       mediatek,phy-switch = <&hifsys>;
 371 +};
 372 +
 373 +&pcie {
 374 +       pinctrl-names = "default";
 375 +       pinctrl-0 = <&pcie_default>;
 376 +       status = "okay";
 377 +
 378 +       pcie@1,0 {
 379 +               status = "okay";
 380 +       };
 381 +
 382 +       pcie@2,0 {
 383 +               status = "okay";
 384 +       };
 385 +};
 386 +
 387 +&pcie1_phy {
 388 +       status = "okay";
 389 +};
 390 +