1 From f4029538f063a845dc9aae46cce4cf386e6253a5 Mon Sep 17 00:00:00 2001
2 From: Sam Shih <sam.shih@mediatek.com>
3 Date: Fri, 18 Nov 2022 20:01:21 +0100
4 Subject: [PATCH 06/19] arm64: dts: mt7986: add spi related device nodes
6 This patch adds spi support for MT7986.
8 Signed-off-by: Sam Shih <sam.shih@mediatek.com>
9 Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
10 Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11 Link: https://lore.kernel.org/r/20221118190126.100895-7-linux@fw-web.de
12 Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
14 arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 35 ++++++++++++++++++++
15 arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 28 ++++++++++++++++
16 arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 35 ++++++++++++++++++++
17 3 files changed, 98 insertions(+)
19 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
20 +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
25 + spi_flash_pins: spi-flash-pins {
28 + groups = "spi0", "spi0_wp_hold";
32 + spic_pins: spic-pins {
39 uart1_pins: uart1-pins {
47 + pinctrl-names = "default";
48 + pinctrl-0 = <&spi_flash_pins>;
49 + cs-gpios = <0>, <0>;
51 + spi_nand: spi_nand@0 {
52 + compatible = "spi-nand";
54 + spi-max-frequency = <10000000>;
55 + spi-tx-bus-width = <4>;
56 + spi-rx-bus-width = <4>;
61 + pinctrl-names = "default";
62 + pinctrl-0 = <&spic_pins>;
63 + cs-gpios = <0>, <0>;
70 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
71 +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
76 + spi0: spi@1100a000 {
77 + compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm";
78 + #address-cells = <1>;
80 + reg = <0 0x1100a000 0 0x100>;
81 + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
82 + clocks = <&topckgen CLK_TOP_MPLL_D2>,
83 + <&topckgen CLK_TOP_SPI_SEL>,
84 + <&infracfg CLK_INFRA_SPI0_CK>,
85 + <&infracfg CLK_INFRA_SPI0_HCK_CK>;
86 + clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk";
87 + status = "disabled";
90 + spi1: spi@1100b000 {
91 + compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm";
92 + #address-cells = <1>;
94 + reg = <0 0x1100b000 0 0x100>;
95 + interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
96 + clocks = <&topckgen CLK_TOP_MPLL_D2>,
97 + <&topckgen CLK_TOP_SPIM_MST_SEL>,
98 + <&infracfg CLK_INFRA_SPI1_CK>,
99 + <&infracfg CLK_INFRA_SPI1_HCK_CK>;
100 + clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk";
101 + status = "disabled";
104 ethsys: syscon@15000000 {
105 #address-cells = <1>;
107 --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
108 +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
113 + spi_flash_pins: spi-flash-pins {
116 + groups = "spi0", "spi0_wp_hold";
120 + spic_pins: spic-pins {
127 wf_2g_5g_pins: wf-2g-5g-pins {
135 + pinctrl-names = "default";
136 + pinctrl-0 = <&spi_flash_pins>;
137 + cs-gpios = <0>, <0>;
139 + spi_nand: spi_nand@0 {
140 + compatible = "spi-nand";
142 + spi-max-frequency = <10000000>;
143 + spi-tx-bus-width = <4>;
144 + spi-rx-bus-width = <4>;
149 + pinctrl-names = "default";
150 + pinctrl-0 = <&spic_pins>;
151 + cs-gpios = <0>, <0>;