1 From 967da67a745fb73fd0fc7aa61fd197b76fceb273 Mon Sep 17 00:00:00 2001
2 From: Daniel Golle <daniel@makrotopia.org>
3 Date: Fri, 21 Apr 2023 00:23:21 +0100
4 Subject: [PATCH] pwm: mediatek: Add support for MT7981
6 The PWM unit on MT7981 uses different register offsets than previous
7 MediaTek PWM units. Add support for these new offsets and add support
8 for PWM on MT7981 which has 3 PWM channels, one of them is typically
9 used for a temperature controlled fan.
10 While at it, also reorder pwm_mediatek_of_data entries to restore
13 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
14 Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
15 Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
16 Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
18 drivers/pwm/pwm-mediatek.c | 39 ++++++++++++++++++++++++++++++--------
19 1 file changed, 31 insertions(+), 8 deletions(-)
21 --- a/drivers/pwm/pwm-mediatek.c
22 +++ b/drivers/pwm/pwm-mediatek.c
23 @@ -38,6 +38,7 @@ struct pwm_mediatek_of_data {
24 unsigned int num_pwms;
27 + const unsigned int *reg_offset;
31 @@ -59,10 +60,14 @@ struct pwm_mediatek_chip {
32 const struct pwm_mediatek_of_data *soc;
35 -static const unsigned int pwm_mediatek_reg_offset[] = {
36 +static const unsigned int mtk_pwm_reg_offset_v1[] = {
37 0x0010, 0x0050, 0x0090, 0x00d0, 0x0110, 0x0150, 0x0190, 0x0220
40 +static const unsigned int mtk_pwm_reg_offset_v2[] = {
41 + 0x0080, 0x00c0, 0x0100, 0x0140, 0x0180, 0x01c0, 0x0200, 0x0240
44 static inline struct pwm_mediatek_chip *
45 to_pwm_mediatek_chip(struct pwm_chip *chip)
47 @@ -111,7 +116,7 @@ static inline void pwm_mediatek_writel(s
48 unsigned int num, unsigned int offset,
51 - writel(value, chip->regs + pwm_mediatek_reg_offset[num] + offset);
52 + writel(value, chip->regs + chip->soc->reg_offset[num] + offset);
55 static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,
56 @@ -285,60 +290,77 @@ static const struct pwm_mediatek_of_data
59 .has_ck_26m_sel = false,
60 + .reg_offset = mtk_pwm_reg_offset_v1,
63 static const struct pwm_mediatek_of_data mt6795_pwm_data = {
66 .has_ck_26m_sel = false,
67 + .reg_offset = mtk_pwm_reg_offset_v1,
70 static const struct pwm_mediatek_of_data mt7622_pwm_data = {
73 .has_ck_26m_sel = true,
74 + .reg_offset = mtk_pwm_reg_offset_v1,
77 static const struct pwm_mediatek_of_data mt7623_pwm_data = {
80 .has_ck_26m_sel = false,
81 + .reg_offset = mtk_pwm_reg_offset_v1,
84 static const struct pwm_mediatek_of_data mt7628_pwm_data = {
87 .has_ck_26m_sel = false,
88 + .reg_offset = mtk_pwm_reg_offset_v1,
91 static const struct pwm_mediatek_of_data mt7629_pwm_data = {
94 .has_ck_26m_sel = false,
95 + .reg_offset = mtk_pwm_reg_offset_v1,
98 -static const struct pwm_mediatek_of_data mt8183_pwm_data = {
100 +static const struct pwm_mediatek_of_data mt7981_pwm_data = {
102 .pwm45_fixup = false,
103 .has_ck_26m_sel = true,
104 + .reg_offset = mtk_pwm_reg_offset_v2,
107 -static const struct pwm_mediatek_of_data mt8365_pwm_data = {
109 +static const struct pwm_mediatek_of_data mt7986_pwm_data = {
111 .pwm45_fixup = false,
112 .has_ck_26m_sel = true,
113 + .reg_offset = mtk_pwm_reg_offset_v1,
116 -static const struct pwm_mediatek_of_data mt7986_pwm_data = {
118 +static const struct pwm_mediatek_of_data mt8183_pwm_data = {
120 + .pwm45_fixup = false,
121 + .has_ck_26m_sel = true,
122 + .reg_offset = mtk_pwm_reg_offset_v1,
125 +static const struct pwm_mediatek_of_data mt8365_pwm_data = {
127 .pwm45_fixup = false,
128 .has_ck_26m_sel = true,
129 + .reg_offset = mtk_pwm_reg_offset_v1,
132 static const struct pwm_mediatek_of_data mt8516_pwm_data = {
134 .pwm45_fixup = false,
135 .has_ck_26m_sel = true,
136 + .reg_offset = mtk_pwm_reg_offset_v1,
139 static const struct of_device_id pwm_mediatek_of_match[] = {
140 @@ -348,6 +370,7 @@ static const struct of_device_id pwm_med
141 { .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
142 { .compatible = "mediatek,mt7628-pwm", .data = &mt7628_pwm_data },
143 { .compatible = "mediatek,mt7629-pwm", .data = &mt7629_pwm_data },
144 + { .compatible = "mediatek,mt7981-pwm", .data = &mt7981_pwm_data },
145 { .compatible = "mediatek,mt7986-pwm", .data = &mt7986_pwm_data },
146 { .compatible = "mediatek,mt8183-pwm", .data = &mt8183_pwm_data },
147 { .compatible = "mediatek,mt8365-pwm", .data = &mt8365_pwm_data },