1 From c1744e9e75a6a8abc7c893f349bcbf725b9c0d74 Mon Sep 17 00:00:00 2001
2 From: Sam Shih <sam.shih@mediatek.com>
3 Date: Fri, 6 Jan 2023 16:28:43 +0100
4 Subject: [PATCH 08/19] arm64: dts: mt7986: add mmc related device nodes
6 This patch adds mmc support for MT7986.
8 Signed-off-by: Sam Shih <sam.shih@mediatek.com>
9 Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
10 Link: https://lore.kernel.org/r/20230106152845.88717-4-linux@fw-web.de
11 Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
13 arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 96 ++++++++++++++++++++
14 arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 15 +++
15 2 files changed, 111 insertions(+)
17 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
18 +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
23 +#include <dt-bindings/pinctrl/mt65xx.h>
25 #include "mt7986a.dtsi"
29 device_type = "memory";
30 reg = <0 0x40000000 0 0x40000000>;
33 + reg_1p8v: regulator-1p8v {
34 + compatible = "regulator-fixed";
35 + regulator-name = "fixed-1.8V";
36 + regulator-min-microvolt = <1800000>;
37 + regulator-max-microvolt = <1800000>;
39 + regulator-always-on;
42 + reg_3p3v: regulator-3p3v {
43 + compatible = "regulator-fixed";
44 + regulator-name = "fixed-3.3V";
45 + regulator-min-microvolt = <3300000>;
46 + regulator-max-microvolt = <3300000>;
48 + regulator-always-on;
58 + pinctrl-names = "default", "state_uhs";
59 + pinctrl-0 = <&mmc0_pins_default>;
60 + pinctrl-1 = <&mmc0_pins_uhs>;
62 + max-frequency = <200000000>;
66 + hs400-ds-delay = <0x14014>;
67 + vmmc-supply = <®_3p3v>;
68 + vqmmc-supply = <®_1p8v>;
76 + mmc0_pins_default: mmc0-pins {
82 + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
83 + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
84 + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
86 + drive-strength = <4>;
87 + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
91 + drive-strength = <6>;
92 + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
96 + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
100 + drive-strength = <4>;
101 + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
105 + mmc0_pins_uhs: mmc0-uhs-pins {
108 + groups = "emmc_51";
111 + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
112 + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
113 + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
115 + drive-strength = <4>;
116 + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
120 + drive-strength = <6>;
121 + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
125 + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
128 + pins = "EMMC_RSTB";
129 + drive-strength = <4>;
130 + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
134 spi_flash_pins: spi-flash-pins {
137 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
138 +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
143 + mmc0: mmc@11230000 {
144 + compatible = "mediatek,mt7986-mmc";
145 + reg = <0 0x11230000 0 0x1000>,
146 + <0 0x11c20000 0 0x1000>;
147 + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
148 + clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>,
149 + <&infracfg CLK_INFRA_MSDC_HCK_CK>,
150 + <&infracfg CLK_INFRA_MSDC_CK>,
151 + <&infracfg CLK_INFRA_MSDC_133M_CK>,
152 + <&infracfg CLK_INFRA_MSDC_66M_CK>;
153 + clock-names = "source", "hclk", "source_cg", "bus_clk",
155 + status = "disabled";
158 usb_phy: t-phy@11e10000 {
159 compatible = "mediatek,mt7986-tphy",
160 "mediatek,generic-tphy-v2";