1 From f3fe3b15eca7908eaac57f9b8387a5dbc45ec5b2 Mon Sep 17 00:00:00 2001
2 From: "SkyLake.Huang" <skylake.huang@mediatek.com>
3 Date: Thu, 23 Jun 2022 18:40:59 +0800
4 Subject: [PATCH 6/6] drivers: mtd: spi-nor: Add calibration support for
7 Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
9 drivers/mtd/nand/spi/core.c | 5 ++++-
10 drivers/mtd/spi-nor/core.c | 15 +++++++++++++++
11 2 files changed, 19 insertions(+), 1 deletion(-)
13 --- a/drivers/mtd/nand/spi/core.c
14 +++ b/drivers/mtd/nand/spi/core.c
15 @@ -1020,7 +1020,10 @@ int spinand_cal_read(void *priv, u32 *ad
19 - ret = spinand_wait(spinand, &status);
20 + ret = spinand_wait(spinand,
21 + SPINAND_READ_INITIAL_DELAY_US,
22 + SPINAND_READ_POLL_DELAY_US,
27 --- a/drivers/mtd/spi-nor/core.c
28 +++ b/drivers/mtd/spi-nor/core.c
29 @@ -3378,6 +3378,18 @@ static const struct flash_info *spi_nor_
33 +static int spi_nor_cal_read(void *priv, u32 *addr, int addrlen, u8 *buf, int readlen)
35 + struct spi_nor *nor = (struct spi_nor *)priv;
37 + nor->reg_proto = SNOR_PROTO_1_1_1;
38 + nor->read_proto = SNOR_PROTO_1_1_1;
39 + nor->read_opcode = SPINOR_OP_READ;
40 + nor->read_dummy = 0;
42 + return nor->controller_ops->read(nor, *addr, readlen, buf);
45 static const struct flash_info *spi_nor_get_flash_info(struct spi_nor *nor,
48 @@ -3506,6 +3518,9 @@ int spi_nor_scan(struct spi_nor *nor, co
53 + spi_mem_do_calibration(nor->spimem, spi_nor_cal_read, nor);
55 info = spi_nor_get_flash_info(nor, name);