1228a9bdfa763fa02331ab4022c33a63035cf321
[openwrt/staging/hauke.git] / target / linux / mpc85xx / files / arch / powerpc / boot / dts / firebox-t10.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later or MIT
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/gpio/gpio.h>
5
6 /include/ "fsl/p1010si-pre.dtsi"
7
8 / {
9 model = "Watchguard Firebox T10";
10 compatible = "watchguard,firebox-t10";
11
12 chosen {
13 bootargs = "console=ttyS0,115200";
14 bootargs-override = "console=ttyS0,115200";
15 };
16
17 aliases {
18 spi0 = &spi0;
19 led-boot = &led_mode;
20 led-failsafe = &led_failover;
21 led-running = &led_mode;
22 led-upgrade = &led_attention;
23 };
24
25 memory {
26 device_type = "memory";
27 };
28
29 leds {
30 compatible = "gpio-leds";
31
32 led_attention: attention_orange {
33 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
34 label = "orange:attention";
35 };
36
37 status_red {
38 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
39 label = "red:status";
40 };
41
42 led_mode: mode_green {
43 gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
44 label = "green:mode";
45 };
46
47 led_failover: failover_green {
48 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
49 label = "green:failover";
50 };
51 };
52
53 buttons {
54 compatible = "gpio-keys";
55
56 reset {
57 label = "Reset button";
58 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
59 linux,code = <KEY_RESTART>;
60 };
61 };
62
63
64 soc: soc@ffe00000 {
65 ranges = <0x0 0x0 0xffe00000 0x100000>;
66
67 i2c@3000 {
68 rtc@30 {
69 compatible = "sii,s35390a";
70 reg = <0x30>;
71 };
72 };
73
74 spi0: spi@7000 {
75 flash@0 {
76 compatible = "jedec,spi-nor";
77 reg = <0>;
78 spi-max-frequency = <25000000>;
79
80 partitions {
81 compatible = "fixed-partitions";
82 #address-cells = <1>;
83 #size-cells = <1>;
84
85 uboot: partition@0 {
86 reg = <0x0 0x90000>;
87 label = "u-boot";
88 read-only;
89 };
90
91 partition@90000 {
92 reg = <0x90000 0x10000>;
93 label = "u-boot-env";
94 };
95
96 partition@a0000 {
97 reg = <0xa0000 0x20000>;
98 label = "cfgxxx";
99 read-only;
100 };
101
102 partition@c0000 {
103 reg = <0xc0000 0x40000>;
104 label = "device_id";
105 read-only;
106
107 nvmem-layout {
108 compatible = "fixed-layout";
109 #address-cells = <1>;
110 #size-cells = <1>;
111
112 macaddr_device_id_1830: mac-address-hex@1830 {
113 reg = <0x1830 0xc>;
114 };
115
116 macaddr_device_id_1844: mac-address-hex@1844 {
117 reg = <0x1844 0xc>;
118 };
119
120 macaddr_device_id_1858: mac-address-hex@1858 {
121 reg = <0x1858 0xc>;
122 };
123 };
124 };
125 };
126 };
127 };
128
129 gpio0: gpio-controller@fc00 {
130 };
131
132 usb@22000 {
133 phy_type = "utmi";
134 dr_mode = "host";
135 };
136
137 mdio@24000 {
138 phy1: ethernet-phy@1 {
139 reg = <0x1>;
140 };
141
142 phy2: ethernet-phy@2 {
143 reg = <0x2>;
144 };
145
146 phy3: ethernet-phy@3 {
147 reg = <0x3>;
148 };
149 };
150
151 mdio@25000 {
152 tbi_phy1: tbi-phy@11 {
153 reg = <0x11>;
154 device_type = "tbi-phy";
155 };
156 };
157
158 mdio@26000 {
159 tbi_phy2: tbi-phy@11 {
160 reg = <0x11>;
161 device_type = "tbi-phy";
162 };
163 };
164
165 enet0: ethernet@b0000 {
166 phy-handle = <&phy1>;
167 phy-connection-type = "rgmii-id";
168
169 nvmem-cells = <&macaddr_device_id_1830>;
170 nvmem-cell-names = "mac-address";
171 };
172
173 enet1: ethernet@b1000 {
174 tbi-handle = <&tbi_phy1>;
175 phy-handle = <&phy2>;
176 phy-connection-type = "sgmii";
177
178 nvmem-cells = <&macaddr_device_id_1844>;
179 nvmem-cell-names = "mac-address";
180 };
181
182 enet2: ethernet@b2000 {
183 tbi-handle = <&tbi_phy2>;
184 phy-handle = <&phy3>;
185 phy-connection-type = "sgmii";
186
187 nvmem-cells = <&macaddr_device_id_1858>;
188 nvmem-cell-names = "mac-address";
189 };
190
191 sdhc@2e000 {
192 status = "disabled";
193 };
194
195 serial1: serial@4600 {
196 status = "disabled";
197 };
198
199 can0: can@1c000 {
200 status = "disabled";
201 };
202
203 can1: can@1d000 {
204 status = "disabled";
205 };
206 };
207
208 pci0: pcie@ffe09000 {
209 status = "disabled";
210 };
211
212 pci1: pcie@ffe0a000 {
213 status = "disabled";
214 };
215
216 ifc: ifc@ffe1e000 {
217 reg = <0x0 0xffe1e000 0 0x2000>;
218
219 /* NOR, NAND Flashes and CPLD on board */
220 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
221 0x1 0x0 0x0 0xff800000 0x00010000
222 0x3 0x0 0x0 0xffb00000 0x00000020>;
223
224 nand@1,0 {
225 compatible = "fsl,ifc-nand";
226 reg = <0x1 0x0 0x10000>;
227
228 partitions {
229 compatible = "fixed-partitions";
230 #address-cells = <1>;
231 #size-cells = <1>;
232
233 /*
234 * Original partition layout:
235 * 0x000000000000-0x000000020000 : "NAND (RW) WG DTB Image"
236 * 0x000000020000-0x000000520000 : "NAND (RW) WG SYSA Kernel"
237 * 0x000000520000-0x000007f00000 : "NAND (RW) WG SYSA_CODE"
238 * 0x000007f00000-0x000008400000 : "NAND (RW) WG SYSB Kernel"
239 * 0x000008400000-0x000009c00000 : "NAND (RW) WG SYSB_CODE"
240 * 0x000009c00000-0x00000a100000 : "NAND (RW) WG SYSA2 Kernel"
241 * 0x00000a100000-0x000011ae0000 : "NAND (RW) WG SYSA_CODE2"
242 * 0x000011ae0000-0x000020000000 : "NAND (RW) WG SYSA_DATA"
243 */
244
245 partition@0 {
246 reg = <0x0 0x20000>;
247 label = "wg-dtb";
248 read-only;
249 };
250
251 partition@20000 {
252 reg = <0x20000 0x500000>;
253 label = "kernel";
254 };
255
256 partition@520000 {
257 reg = <0x520000 0x79e0000>;
258 label = "wg-sysa-rootfs";
259 read-only;
260 };
261
262 partition@7f00000 {
263 reg = <0x7f00000 0x500000>;
264 label = "wg-sysb-kernel";
265 read-only;
266 };
267
268 partition@8400000 {
269 reg = <0x8400000 0x1800000>;
270 label = "wg-sysb-rootfs";
271 read-only;
272 };
273
274 partition@9c00000 {
275 reg = <0x9c00000 0x500000>;
276 label = "wg-sysa2-kernel";
277 read-only;
278 };
279
280 partition@a100000 {
281 reg = <0xa100000 0x79e0000>;
282 label = "wg-sysa2-rootfs";
283 read-only;
284 };
285
286 partition@11ae0000 {
287 reg = <0x11ae0000 0xe520000>;
288 label = "ubi";
289 };
290 };
291 };
292 };
293 };
294
295 /include/ "fsl/p1010si-post.dtsi"