2 * Aerohive HiveAP-330 Device Tree Source
4 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
12 /include/ "fsl/p1020si-pre.dtsi"
14 model = "Aerohive HiveAP-330";
15 compatible = "aerohive,hiveap-330";
18 led-boot = &tricolor_green;
19 led-failsafe = &tricolor_red;
20 led-running = &tricolor_green;
21 led-upgrade = &tricolor_red;
22 label-mac-device = &enet0;
26 bootargs-override = "console=ttyS0,9600";
30 device_type = "memory";
33 board_lbc: lbc: localbus@ffe05000 {
34 reg = <0 0xffe05000 0 0x1000>;
35 ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
40 compatible = "cfi-flash";
41 reg = <0x0 0x0 0x4000000>;
51 reg = <0x40000 0x40000>;
56 reg = <0x80000 0x27c0000>;
61 reg = <0x2840000 0x800000>;
66 reg = <0x3040000 0xec0000>;
67 label = "stock-jffs2";
71 hwinfo: partition@3f00000 {
72 reg = <0x3f00000 0x20000>;
78 reg = <0x3f20000 0x20000>;
84 reg = <0x3f40000 0x20000>;
85 label = "boot-info-backup";
90 reg = <0x3f60000 0x20000>;
95 reg = <0x3f80000 0x80000>;
101 reg = <0x0 0x3040000>;
107 board_soc: soc: soc@ffe00000 {
108 ranges = <0x0 0x0 0xffe00000 0x100000>;
112 compatible = "atmel,at97sc3204t";
117 compatible = "national,lp5521";
119 clock-mode = /bits/ 8 <2>;
120 tricolor_red: chan0 {
121 chan-name = "hiveap-330:red:tricolor0";
122 led-cur = /bits/ 8 <0x2f>;
123 max-cur = /bits/ 8 <0x5f>;
125 tricolor_green:chan1 {
126 chan-name = "hiveap-330:green:tricolor0";
127 led-cur = /bits/ 8 <0x2f>;
128 max-cur = /bits/ 8 <0x5f>;
131 chan-name = "hiveap-330:blue:tricolor0";
132 led-cur = /bits/ 8 <0x2f>;
133 max-cur = /bits/ 8 <0x5f>;
137 /* Most likely SoC boot config */
139 compatible = "eeprom";
145 phy0: ethernet-phy@0 {
146 interrupts = <3 1 0 0>;
150 phy1: ethernet-phy@1 {
151 interrupts = <2 1 0 0>;
164 enet0: ethernet@b0000 {
166 phy-handle = <&phy0>;
167 phy-connection-type = "rgmii-id";
168 mtd-mac-address = <&hwinfo 0>;
171 enet1: ethernet@b1000 {
175 enet2: ethernet@b2000 {
177 phy-handle = <&phy1>;
178 phy-connection-type = "rgmii-id";
179 mtd-mac-address = <&hwinfo 0>;
180 mtd-mac-address-increment = <1>;
183 gpio0: gpio-controller@fc00 {
196 pci0: pcie@ffe09000 {
197 reg = <0x0 0xffe09000 0x0 0x1000>;
198 ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
199 0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>;
201 ranges = <0x2000000 0x0 0xa0000000
202 0x2000000 0x0 0xa0000000
211 pci1: pcie@ffe0a000 {
212 reg = <0x0 0xffe0a000 0x0 0x1000>;
213 ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
214 0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
216 ranges = <0x2000000 0x0 0xc0000000
217 0x2000000 0x0 0xc0000000
227 compatible = "gpio-keys";
230 label = "Reset button";
231 gpios = <&gpio0 8 1>; /* active low */
232 linux,code = <0x198>; /* KEY_RESTART */
236 /include/ "fsl/p1020si-post.dtsi"