2 * Aerohive HiveAP-330 Device Tree Source
4 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
12 /include/ "fsl/p1020si-pre.dtsi"
14 model = "Aerohive HiveAP-330";
15 compatible = "aerohive,hiveap-330";
18 led-boot = &tricolor_green;
19 led-failsafe = &tricolor_red;
20 led-running = &tricolor_green;
21 led-upgrade = &tricolor_red;
25 bootargs-override = "console=ttyS0,9600";
29 device_type = "memory";
32 board_lbc: lbc: localbus@ffe05000 {
33 reg = <0 0xffe05000 0 0x1000>;
34 ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x4000000>;
50 reg = <0x40000 0x40000>;
55 reg = <0x80000 0x27c0000>;
60 reg = <0x2840000 0x800000>;
65 reg = <0x3040000 0xec0000>;
66 label = "stock-jffs2";
70 hwinfo: partition@3f00000 {
71 reg = <0x3f00000 0x20000>;
77 reg = <0x3f20000 0x20000>;
83 reg = <0x3f40000 0x20000>;
84 label = "boot-info-backup";
89 reg = <0x3f60000 0x20000>;
94 reg = <0x3f80000 0x80000>;
100 reg = <0x0 0x3040000>;
106 board_soc: soc: soc@ffe00000 {
107 ranges = <0x0 0x0 0xffe00000 0x100000>;
111 compatible = "atmel,at97sc3204t";
116 compatible = "national,lp5521";
118 clock-mode = /bits/ 8 <2>;
119 tricolor_red: chan0 {
120 chan-name = "hiveap-330:red:tricolor0";
121 led-cur = /bits/ 8 <0x2f>;
122 max-cur = /bits/ 8 <0x5f>;
124 tricolor_green:chan1 {
125 chan-name = "hiveap-330:green:tricolor0";
126 led-cur = /bits/ 8 <0x2f>;
127 max-cur = /bits/ 8 <0x5f>;
130 chan-name = "hiveap-330:blue:tricolor0";
131 led-cur = /bits/ 8 <0x2f>;
132 max-cur = /bits/ 8 <0x5f>;
136 /* Most likely SoC boot config */
138 compatible = "eeprom";
144 phy0: ethernet-phy@0 {
145 interrupts = <3 1 0 0>;
149 phy1: ethernet-phy@1 {
150 interrupts = <2 1 0 0>;
163 enet0: ethernet@b0000 {
165 phy-handle = <&phy0>;
166 phy-connection-type = "rgmii-id";
167 mtd-mac-address = <&hwinfo 0>;
170 enet1: ethernet@b1000 {
174 enet2: ethernet@b2000 {
176 phy-handle = <&phy1>;
177 phy-connection-type = "rgmii-id";
178 mtd-mac-address = <&hwinfo 0>;
179 mtd-mac-address-increment = <1>;
182 gpio0: gpio-controller@fc00 {
195 pci0: pcie@ffe09000 {
196 reg = <0x0 0xffe09000 0x0 0x1000>;
197 ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
198 0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>;
200 ranges = <0x2000000 0x0 0xa0000000
201 0x2000000 0x0 0xa0000000
210 pci1: pcie@ffe0a000 {
211 reg = <0x0 0xffe0a000 0x0 0x1000>;
212 ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
213 0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
215 ranges = <0x2000000 0x0 0xc0000000
216 0x2000000 0x0 0xc0000000
226 compatible = "gpio-keys";
229 label = "Reset button";
230 gpios = <&gpio0 8 1>; /* active low */
231 linux,code = <0x198>; /* KEY_RESTART */
235 /include/ "fsl/p1020si-post.dtsi"