2 * Aerohive HiveAP-330 Device Tree Source
4 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
12 /include/ "fsl/p1020si-pre.dtsi"
14 model = "Aerohive HiveAP-330";
15 compatible = "aerohive,hiveap-330";
18 bootargs = "console=ttyS0,9600";
19 bootargs-override = "console=ttyS0,9600 noinitrd";
23 device_type = "memory";
26 board_lbc: lbc: localbus@ffe05000 {
27 reg = <0 0xffe05000 0 0x1000>;
28 ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
33 compatible = "cfi-flash";
34 reg = <0x0 0x0 0x4000000>;
44 reg = <0x40000 0x40000>;
49 reg = <0x80000 0x27c0000>;
54 reg = <0x2840000 0x800000>;
59 reg = <0x3040000 0xec0000>;
60 label = "stock-jffs2";
65 reg = <0x3f00000 0x20000>;
71 reg = <0x3f20000 0x20000>;
77 reg = <0x3f40000 0x20000>;
78 label = "boot-info-backup";
83 reg = <0x3f60000 0x20000>;
88 reg = <0x3f80000 0x80000>;
94 reg = <0x0 0x3040000>;
100 board_soc: soc: soc@ffe00000 {
101 ranges = <0x0 0x0 0xffe00000 0x100000>;
105 compatible = "atmel,at97sc3204t";
110 compatible = "national,lp5521";
112 clock-mode = /bits/ 8 <2>;
114 chan-name = "hiveap-330:red:tricolor0";
115 led-cur = /bits/ 8 <0x2f>;
116 max-cur = /bits/ 8 <0x5f>;
119 chan-name = "hiveap-330:green:tricolor0";
120 led-cur = /bits/ 8 <0x2f>;
121 max-cur = /bits/ 8 <0x5f>;
124 chan-name = "hiveap-330:blue:tricolor0";
125 led-cur = /bits/ 8 <0x2f>;
126 max-cur = /bits/ 8 <0x5f>;
130 /* Most likely SoC boot config */
132 compatible = "eeprom";
138 phy0: ethernet-phy@0 {
139 interrupts = <3 1 0 0>;
143 phy1: ethernet-phy@1 {
144 interrupts = <2 1 0 0>;
157 enet0: ethernet@b0000 {
159 phy-handle = <&phy0>;
160 phy-connection-type = "rgmii-id";
164 enet1: ethernet@b1000 {
168 enet2: ethernet@b2000 {
170 phy-handle = <&phy1>;
171 phy-connection-type = "rgmii-id";
174 gpio0: gpio-controller@fc00 {
187 pci0: pcie@ffe09000 {
188 reg = <0x0 0xffe09000 0x0 0x1000>;
189 ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
190 0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>;
192 ranges = <0x2000000 0x0 0xa0000000
193 0x2000000 0x0 0xa0000000
202 pci1: pcie@ffe0a000 {
203 reg = <0x0 0xffe0a000 0x0 0x1000>;
204 ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
205 0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
207 ranges = <0x2000000 0x0 0xc0000000
208 0x2000000 0x0 0xc0000000
218 compatible = "gpio-keys";
221 label = "Reset button";
222 gpios = <&gpio0 8 1>; /* active low */
223 linux,code = <0x198>; /* KEY_RESTART */
227 /include/ "fsl/p1020si-post.dtsi"