target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3715i.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later or MIT
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4
   5 /include/ "fsl/p1010si-pre.dtsi"
   6
   7 / {
   8         model = "Enterasys WS-AP3715i";
   9         compatible = "enterasys,ws-ap3715i";
  10
  11         aliases {
  12                 led-boot = &led_power_green;
  13                 led-failsafe = &led_power_red;
  14                 led-running = &led_power_green;
  15                 led-upgrade = &led_power_red;
  16                 label-mac-device = &enet0;
  17         };
  18
  19         chosen {
  20                 bootargs = "console=ttyS0,115200";
  21         };
  22
  23         memory {
  24                 device_type = "memory";
  25                 reg = <0x0 0x0 0x0 0x10000000>;
  26         };
  27
  28         leds {
  29                 compatible = "gpio-leds";
  30
  31                 wifi1 {
  32                         gpios = <&spi_gpio 3 GPIO_ACTIVE_HIGH>;
  33                         label = "green:radio1";
  34                         linux,default-trigger = "phy1tpt";
  35                 };
  36
  37                 wifi2 {
  38                         gpios = <&spi_gpio 2 GPIO_ACTIVE_HIGH>;
  39                         label = "green:radio2";
  40                         linux,default-trigger = "phy0tpt";
  41                 };
  42
  43                 led_power_green: power_green {
  44                         gpios = <&spi_gpio 0 GPIO_ACTIVE_HIGH>;
  45                         label = "green:power";
  46                 };
  47
  48                 led_power_red: power_red {
  49                         gpios = <&spi_gpio 1 GPIO_ACTIVE_HIGH>;
  50                         label = "red:power";
  51                 };
  52
  53                 lan1_red {
  54                         gpios = <&spi_gpio 6 GPIO_ACTIVE_HIGH>;
  55                         label = "red:lan1";
  56                 };
  57
  58                 lan1_green {
  59                         gpios = <&spi_gpio 4 GPIO_ACTIVE_HIGH>;
  60                         label = "green:lan1";
  61                 };
  62
  63                 lan2_red {
  64                         gpios = <&spi_gpio 7 GPIO_ACTIVE_HIGH>;
  65                         label = "red:lan2";
  66                 };
  67
  68                 lan2_green {
  69                         gpios = <&spi_gpio 5 GPIO_ACTIVE_HIGH>;
  70                         label = "green:lan2";
  71                 };
  72         };
  73
  74         soc: soc@ffe00000 {
  75                 ranges = <0x0 0x0 0xffe00000 0x100000>;
  76
  77                 gpio0: gpio-controller@fc00 {
  78                 };
  79
  80                 usb@22000 {
  81                         status = "disabled";
  82                 };
  83
  84                 mdio@24000 {
  85                         phy0: ethernet-phy@0 {
  86                                 reg = <0x1>;
  87                         };
  88
  89                         phy2: ethernet-phy@2 {
  90                                 reg = <0x2>;
  91                         };
  92                 };
  93
  94                 mdio@25000 {
  95                         tbi_phy: tbi-phy@11 {
  96                                 reg = <0x11>;
  97                         };
  98                 };
  99
 100                 mdio@26000 {
 101                         status = "disabled";
 102                 };
 103
 104                 enet0: ethernet@b0000 {
 105                         phy-handle = <&phy0>;
 106                         phy-connection-type = "rgmii-id";
 107
 108                         label = "lan1";
 109                 };
 110
 111                 enet1: ethernet@b1000 {
 112                         phy-handle = <&phy2>;
 113                         phy-connection-type = "sgmii";
 114
 115                         tbi-handle = <&tbi_phy>;
 116
 117                         label = "lan2";
 118                 };
 119
 120                 enet2: ethernet@b2000 {
 121                         status = "disabled";
 122                 };
 123
 124                 sdhc@2e000 {
 125                         status = "disabled";
 126                 };
 127         };
 128
 129         ifc: ifc@ffe1e000 {
 130         };
 131
 132         pci0: pcie@ffe09000 {
 133                 reg = <0 0xffe09000 0 0x1000>;
 134                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
 135                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
 136                 pcie@0 {
 137                         ranges = <0x2000000 0x0 0xa0000000
 138                                   0x2000000 0x0 0xa0000000
 139                                   0x0 0x20000000
 140
 141                                   0x1000000 0x0 0x0
 142                                   0x1000000 0x0 0x0
 143                                   0x0 0x100000>;
 144
 145                         wifi@0,0,0 {
 146                                 compatible = "pci168c,0033";
 147                                 reg = <0x0 0 0 0 0>;
 148                                 ieee80211-freq-limit = <2400000 2500000>;
 149                         };
 150                 };
 151         };
 152
 153         pci1: pcie@ffe0a000 {
 154                 reg = <0 0xffe0a000 0 0x1000>;
 155                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
 156                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
 157                 pcie@0 {
 158                         ranges = <0x2000000 0x0 0x80000000
 159                                   0x2000000 0x0 0x80000000
 160                                   0x0 0x20000000
 161
 162                                   0x1000000 0x0 0x0
 163                                   0x1000000 0x0 0x0
 164                                   0x0 0x100000>;
 165
 166                         wifi@0,0,0 {
 167                                 compatible = "pci168c,0033";
 168                                 reg = <0x0 0 0 0 0>;
 169                                 ieee80211-freq-limit = <5000000 6000000>;
 170                         };
 171                 };
 172         };
 173 };
 174
 175 &soc {
 176         led_spi {
 177                 compatible = "spi-gpio";
 178                 #address-cells = <1>;
 179                 #size-cells = <0>;
 180
 181                 sck-gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
 182                 mosi-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 183                 num-chipselects = <0>;
 184
 185                 spi_gpio: led_gpio@0 {
 186                         compatible = "fairchild,74hc595";
 187                         reg = <0>;
 188                         gpio-controller;
 189                         #gpio-cells = <2>;
 190                         registers-number = <1>;
 191                         spi-max-frequency = <100000>;
 192                 };
 193         };
 194
 195         spi0: spi@7000 {
 196                 flash@0 {
 197                         compatible = "jedec,spi-nor";
 198                         reg = <0>;
 199                         spi-max-frequency = <25000000>;
 200
 201                         partitions {
 202                                 compatible = "fixed-partitions";
 203                                 #address-cells = <1>;
 204                                 #size-cells = <1>;
 205
 206                                 partition@0 {
 207                                         reg = <0x0 0xa0000>;
 208                                         label = "boot-bak";
 209                                         read-only;
 210                                 };
 211
 212                                 partition@a0000 {
 213                                         reg = <0xa0000 0xa0000>;
 214                                         label = "boot-pri";
 215                                         read-only;
 216                                 };
 217
 218                                 partition@120000 {
 219                                         reg = <0x120000 0x10000>;
 220                                         label = "cfg1";
 221                                         read-only;
 222                                 };
 223
 224                                 partition@130000 {
 225                                         reg = <0x130000 0x10000>;
 226                                         label = "cfg2";
 227                                         read-only;
 228                                 };
 229
 230                                 partition@140000 {
 231                                         compatible = "denx,uimage";
 232                                         reg = <0x140000 0x1d80000>;
 233                                         label = "firmware";
 234                                 };
 235
 236                                 partition@1ec0000 {
 237                                         reg = <0x1ec0000 0x100000>;
 238                                         label = "nvram";
 239                                         read-only;
 240                                 };
 241                         };
 242                 };
 243         };
 244 };
 245
 246 /include/ "fsl/p1010si-post.dtsi"
 247
 248 / {
 249         cpus {
 250                 PowerPC,P1010@0 {
 251                         bus-frequency = <399999996>;
 252                         timebase-frequency = <50000000>;
 253                         clock-frequency = <799999992>;
 254                         d-cache-block-size = <0x20>;
 255                         d-cache-size = <0x8000>;
 256                         d-cache-sets = <0x80>;
 257                         i-cache-block-size = <0x20>;
 258                         i-cache-size = <0x8000>;
 259                         i-cache-sets = <0x80>;
 260                 };
 261         };
 262
 263         soc@ffe00000 {
 264                 bus-frequency = <399999996>;
 265
 266                 serial@4600 {
 267                         clock-frequency = <399999996>;
 268                         status = "disabled";
 269                 };
 270
 271                 serial@4500 {
 272                         clock-frequency = <399999996>;
 273                 };
 274
 275                 pic@40000 {
 276                         clock-frequency = <399999996>;
 277                 };
 278         };
 279 };
 280
 281 /*
 282  * For the OpenWrt 22.03 release, since Linux 5.10.138 now uses
 283  * aliases to determine PCI domain numbers, drop aliases so as not to
 284  * change the sysfs path of our wireless netdevs.
 285  */
 286
 287 / {
 288         aliases {
 289                 /delete-property/ pci0;
 290                 /delete-property/ pci1;
 291         };
 292 };
 293