1 // SPDX-License-Identifier: GPL-2.0-or-later or MIT
3 /include/ "fsl/p1020si-pre.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
10 model = "Extreme Networks WS-AP3825i";
11 compatible = "extreme-networks,ws-ap3825i";
19 led-boot = &led_power_green;
20 led-failsafe = &led_power_red;
21 led-running = &led_power_green;
22 led-upgrade = &led_power_red;
26 bootargs-override = "console=ttyS0,115200";
27 stdout-path = &serial0;
31 device_type = "memory";
35 compatible = "gpio-leds";
38 gpios = <&spi_gpio 3 GPIO_ACTIVE_HIGH>;
39 label = "green:radio1";
40 linux,default-trigger = "phy0tpt";
44 gpios = <&spi_gpio 2 GPIO_ACTIVE_HIGH>;
45 label = "green:radio2";
46 linux,default-trigger = "phy1tpt";
49 led_power_green: power_green {
50 gpios = <&spi_gpio 0 GPIO_ACTIVE_HIGH>;
51 function = LED_FUNCTION_POWER;
52 color = <LED_COLOR_ID_GREEN>;
55 led_power_red: power_red {
56 gpios = <&spi_gpio 1 GPIO_ACTIVE_HIGH>;
57 function = LED_FUNCTION_POWER;
58 color = <LED_COLOR_ID_RED>;
62 gpios = <&spi_gpio 6 GPIO_ACTIVE_HIGH>;
67 gpios = <&spi_gpio 4 GPIO_ACTIVE_HIGH>;
72 gpios = <&spi_gpio 7 GPIO_ACTIVE_HIGH>;
77 gpios = <&spi_gpio 5 GPIO_ACTIVE_HIGH>;
83 compatible = "gpio-keys";
86 label = "Reset button";
87 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
88 linux,code = <KEY_RESTART>;
92 lbc: localbus@ffe05000 {
93 reg = <0 0xffe05000 0 0x1000>;
94 ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
99 compatible = "cfi-flash";
100 reg = <0x0 0x0 0x4000000>;
105 compatible = "fixed-partitions";
106 #address-cells = <1>;
110 compatible = "denx,fit";
111 reg = <0x0 0x3d60000>;
116 reg = <0x3d60000 0x20000>;
122 reg = <0x3d80000 0x80000>;
128 reg = <0x3e00000 0x100000>;
134 reg = <0x3f00000 0x20000>;
139 reg = <0x3f20000 0x20000>;
147 ranges = <0x0 0x0 0xffe00000 0x100000>;
149 gpio0: gpio-controller@fc00 {
153 phy0: ethernet-phy@0 {
154 /* interrupts = <3 1 0 0>; */
156 reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
157 reset-assert-us = <10000>;
158 reset-deassert-us = <10000>;
161 phy2: ethernet-phy@2 {
162 /* interrupts = <1 1 0 0>; */
164 reset-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
165 reset-assert-us = <10000>;
166 reset-deassert-us = <10000>;
178 enet0: ethernet@b0000 {
180 phy-handle = <&phy0>;
181 phy-connection-type = "rgmii-id";
184 enet1: ethernet@b1000 {
188 enet2: ethernet@b2000 {
190 phy-handle = <&phy2>;
191 phy-connection-type = "rgmii-id";
204 pci0: pcie@ffe09000 {
205 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
206 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
207 reg = <0 0xffe09000 0 0x1000>;
209 /* Filled by U-Boot */
210 bus-range = <0x00 0x01>;
211 dma-ranges = <0x2000000 0x00 0xfff00000 0x00 0xffe00000
212 0x00 0x100000 0x42000000 0x00 0x00 0x00
213 0x00 0x00 0x10000000>;
216 ranges = <0x2000000 0x0 0xa0000000
217 0x2000000 0x0 0xa0000000
226 pci1: pcie@ffe0a000 {
227 reg = <0 0xffe0a000 0 0x1000>;
228 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
229 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
231 /* Filled by U-Boot */
232 bus-range = <0x00 0x01>;
233 dma-ranges = <0x2000000 0x00 0xfff00000 0x00
234 0xffe00000 0x00 0x100000 0x42000000
235 0x00 0x00 0x00 0x00 0x00 0x10000000>;
238 ranges = <0x2000000 0x0 0x80000000
239 0x2000000 0x0 0x80000000
252 * This is currently non-functioning because the spi-gpio
253 * driver refuses to register when presented with this node.
255 compatible = "spi-gpio";
256 #address-cells = <1>;
259 sck-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
260 mosi-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
261 num-chipselects = <0>;
263 spi_gpio: led_gpio@0 {
264 compatible = "fairchild,74hc595";
268 registers-number = <1>;
269 spi-max-frequency = <100000>;
274 /include/ "fsl/p1020si-post.dtsi"
279 bus-frequency = <399999996>;
280 timebase-frequency = <50000000>;
281 clock-frequency = <799999992>;
282 d-cache-block-size = <0x20>;
283 d-cache-size = <0x8000>;
284 d-cache-sets = <0x80>;
285 i-cache-block-size = <0x20>;
286 i-cache-size = <0x8000>;
287 i-cache-sets = <0x80>;
288 cpu-release-addr = <0x0 0x0ffff280>;
290 enable-method = "spin-table";
294 bus-frequency = <399999996>;
295 timebase-frequency = <50000000>;
296 clock-frequency = <799999992>;
297 d-cache-block-size = <0x20>;
298 d-cache-size = <0x8000>;
299 d-cache-sets = <0x80>;
300 i-cache-block-size = <0x20>;
301 i-cache-size = <0x8000>;
302 i-cache-sets = <0x80>;
303 cpu-release-addr = <0x0 0x0ffff2a0>;
305 enable-method = "spin-table";
310 reg = <0x0 0x0 0x0 0x10000000>;
314 #address-cells = <2>;
318 cpu1-bootpage@ff00000 {
319 /* Reserve upper 1 MB for second-core-bootpage */
320 reg = <0x0 0xff00000 0x0 0x100000>;
325 bus-frequency = <399999996>;
328 clock-frequency = <399999996>;
332 clock-frequency = <399999996>;
336 clock-frequency = <399999996>;
341 bus-frequency = <24999999>;
346 rx-stash-idx = <0x00>;
347 rx-stash-len = <0x60>;
352 rx-stash-idx = <0x00>;
353 rx-stash-len = <0x60>;
358 * For the OpenWrt 22.03 release, since Linux 5.10.138 now uses
359 * aliases to determine PCI domain numbers, drop aliases so as not to
360 * change the sysfs path of our wireless netdevs.
365 /delete-property/ pci0;
366 /delete-property/ pci1;