1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright SolidRun Ltd.
4 * Copyright (C) 2024 Tobias Schramm <tobias@t-sys.eu>
6 * Device tree for the CN9130-based ClearFog Pro
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
15 model = "SolidRun ClearFog Pro";
16 compatible = "solidrun,clearfog-pro", "marvell,armada-ap807-quad",
17 "marvell,armada-ap807";
20 stdout-path = "serial0:115200n8";
27 ethernet0 = &cp0_eth0;
28 ethernet1 = &cp0_eth1;
29 ethernet2 = &cp0_eth2;
34 reg = <0x0 0x0 0x1 0x0>;
35 device_type = "memory";
38 /* Virtual regulator, root of power tree */
40 compatible = "regulator-fixed";
41 regulator-name = "vin";
43 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <12000000>;
47 /* Regulators supplied by vin */
48 v_5v0: regulator-v_5v0 {
49 compatible = "regulator-fixed";
50 regulator-name = "v_5v0";
52 regulator-min-microvolt = <5000000>;
53 regulator-max-microvolt = <5000000>;
57 v_3v3: regulator-v_3v3 {
58 compatible = "regulator-fixed";
59 regulator-name = "v_3v3";
61 regulator-min-microvolt = <3300000>;
62 regulator-max-microvolt = <3300000>;
66 /* Regulators supplied by v_5v0 */
67 v_1v8: regulator-v_1v8 {
68 compatible = "regulator-fixed";
69 regulator-name = "v_1v8";
71 regulator-min-microvolt = <1800000>;
72 regulator-max-microvolt = <1800000>;
73 vin-supply = <&v_5v0>;
76 v_5v0_usb3_hst_vbus: regulator-v_5v0_usb3_hst_vbus {
77 compatible = "regulator-fixed";
78 regulator-name = "v_5v0_usb3_hst_vbus";
79 regulator-min-microvolt = <5000000>;
80 regulator-max-microvolt = <5000000>;
81 gpio = <&expander0 6 GPIO_ACTIVE_LOW>;
82 vin-supply = <&v_5v0>;
85 /* Regulators internal to SOM */
86 vqmmc: regulator-vqmmc {
87 compatible = "regulator-fixed";
88 regulator-name = "vqmmc";
90 regulator-min-microvolt = <1800000>;
91 regulator-max-microvolt = <1800000>;
92 vin-supply = <&v_5v0>;
95 cp0_usb3_0_phy1: cp0_usb3_phy@1 {
96 compatible = "usb-nop-xceiv";
97 vbus-supply = <&v_5v0_usb3_hst_vbus>;
100 cp0_sfp_eth0: sfp-eth@0 {
101 compatible = "sff,sfp";
102 i2c-bus = <&cp0_i2c1>;
103 los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
104 mod-def0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;
105 tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
106 tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
107 maximum-power-milliwatt = <2000>;
111 compatible = "gpio-keys";
112 pinctrl-names = "default";
113 pinctrl-0 = <&cp0_button_pin>;
117 linux,code = <KEY_RESTART>;
118 gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>;
130 pinctrl-names = "default";
131 vqmmc-supply = <&vqmmc>;
153 pinctrl-names = "default";
154 pinctrl-0 = <&cp0_i2c0_pins>;
155 clock-frequency = <100000>;
158 * PCA9655 GPIO expander, up to 1MHz clock.
176 expander0: gpio-expander@20 {
177 compatible = "nxp,pca9555";
181 interrupt-controller;
182 #interrupt-cells = <2>;
183 interrupt-parent = <&cp0_gpio1>;
184 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
185 pinctrl-names = "default";
186 pinctrl-0 = <&cp0_expander0_pins>;
187 vcc-supply = <&v_3v3>;
191 gpios = <0 GPIO_ACTIVE_LOW>;
193 line-name = "pcie1.0-clkreq";
198 gpios = <3 GPIO_ACTIVE_LOW>;
200 line-name = "pcie1.0-w-disable";
205 gpios = <4 GPIO_ACTIVE_LOW>;
207 line-name = "pcie2.0-clkreq";
212 gpios = <7 GPIO_ACTIVE_LOW>;
214 line-name = "pcie2.0-w-disable";
219 gpios = <5 GPIO_ACTIVE_LOW>;
221 line-name = "usb3-current-limit";
226 gpios = <11 GPIO_ACTIVE_HIGH>;
228 line-name = "m.2 devslp";
232 /* ADC only for mikroBUS connector */
234 compatible = "microchip,mcp3021";
238 /* EEPROM on the SOM */
240 compatible = "atmel,24c02";
246 compatible = "onie,tlv-layout";
248 onie_tlv_macaddr: mac-address {
249 #nvmem-cell-cells = <1>;
255 /* SMBUS on mini PCIe sockets */
258 pinctrl-names = "default";
259 pinctrl-0 = <&cp0_i2c1_pins>;
260 clock-frequency = <100000>;
266 phy0: ethernet-phy@0 {
268 /* Green led blinks on activity, orange LED on link */
269 marvell,reg-init = <3 16 0 0x0064>;
273 compatible = "marvell,mv88e6085";
275 interrupt-controller;
276 #interrupt-cells = <2>;
277 interrupt-parent = <&cp0_gpio1>;
278 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
279 pinctrl-names = "default";
280 pinctrl-0 = <&cp0_dsa0_pins>;
281 reset-gpios = <&cp0_gpio1 27 GPIO_ACTIVE_LOW>;
284 compatible = "marvell,mv88e6xxx-mdio-external";
285 #address-cells = <1>;
289 port6_phy: ethernet-phy@1 {
295 #address-cells = <1>;
325 ethernet = <&cp0_eth1>;
327 phy-mode = "rgmii-id";
336 /* 88E1512 external phy */
339 phy-handle = <&port6_phy>;
340 phy-mode = "rgmii-id";
346 /* SRDS #0 - SATA on bottom M.2 B-Key connector */
355 phys = <&cp0_comphy0 1>;
356 target-supply = <&v_3v3>;
364 /* mini PCIe slot far from SOM, USB 2.0 only, SS lanes unused */
372 /* SRDS #1 - USB-A 3.0 host port */
375 phys = <&cp0_utmi1>, <&cp0_comphy1 0>;
376 phy-names = "utmi", "usb";
377 usb-phy = <&cp0_usb3_0_phy1>;
381 /* SRDS #2 - SFP+ 10GE */
384 phy-mode = "10gbase-r";
385 phys = <&cp0_comphy2 0>;
386 managed = "in-band-status";
387 nvmem-cells = <&onie_tlv_macaddr 0>;
388 nvmem-cell-names = "mac-address";
389 sfp = <&cp0_sfp_eth0>;
392 /* SRDS #3 - SGMII 1GE to L2 switch */
395 phys = <&cp0_comphy3 1>;
397 nvmem-cells = <&onie_tlv_macaddr 1>;
398 nvmem-cell-names = "mac-address";
406 /* SRDS #4 - mini PCIe slot near SOM */
409 phys = <&cp0_comphy4 1>;
411 reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
414 /* SRDS #5 - mini PCIe slot far from SOM */
417 phys = <&cp0_comphy5 2>;
419 reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
425 pinctrl-names = "default";
426 pinctrl-0 = <&cp0_ge2_rgmii_pins>;
428 phy-mode = "rgmii-id";
429 nvmem-cells = <&onie_tlv_macaddr 2>;
430 nvmem-cell-names = "mac-address";
433 /* micro SD card slot */
436 pinctrl-names = "default";
437 pinctrl-0 = <&cp0_sdhci_pins &cp0_sdhci_cd_pins>;
439 cd-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
441 vqmmc-supply = <&v_3v3>;
442 vmmc-supply = <&v_3v3>;
447 pinctrl-names = "default";
448 pinctrl-0 = <&cp0_spi1_pins>;
451 compatible = "jedec,spi-nor";
453 #address-cells = <0x1>;
455 spi-max-frequency = <10000000>;
460 cp0_pinctrl: pinctrl {
461 compatible = "marvell,cp115-standalone-pinctrl";
463 cp0_i2c0_pins: cp0-i2c0-pins {
464 marvell,pins = "mpp37", "mpp38";
465 marvell,function = "i2c0";
468 cp0_i2c1_pins: cp0-i2c1-pins {
469 marvell,pins = "mpp35", "mpp36";
470 marvell,function = "i2c1";
473 cp0_ge2_rgmii_pins: cp0-ge2-rgmii-pins {
474 marvell,pins = "mpp44", "mpp45", "mpp46",
475 "mpp47", "mpp48", "mpp49",
476 "mpp50", "mpp51", "mpp52",
477 "mpp53", "mpp54", "mpp55";
478 marvell,function = "ge1";
481 cp0_sdhci_cd_pins: cp0-sdhci-cd-pins {
482 marvell,pins = "mpp43";
483 marvell,function = "sdio";
486 cp0_sdhci_pins: cp0-sdhci-pins {
487 marvell,pins = "mpp56", "mpp57", "mpp58",
488 "mpp59", "mpp60", "mpp61";
489 marvell,function = "sdio";
492 cp0_spi1_pins: cp0-spi1-pins {
493 marvell,pins = "mpp12", "mpp13", "mpp14",
495 marvell,function = "spi1";
498 cp0_dsa0_pins: cp0-dsa0-pins {
499 marvell,pins = "mpp27", "mpp29";
500 marvell,function = "gpio";
503 cp0_button_pin: cp0-button-pin {
504 marvell,pins = "mpp32";
505 marvell,function = "gpio";
508 cp0_expander0_pins: cp0-expander0-pins {
509 marvell,pins = "mpp4";
510 marvell,function = "gpio";