1 From adbba4cf6ea15c2acb53e3fd9fc03c6b37f1f1fc Mon Sep 17 00:00:00 2001
2 From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
3 Date: Mon, 12 Aug 2013 14:14:51 -0300
4 Subject: [PATCH 118/203] mtd: nand: pxa3xx: Use 'length override' in ONFI
7 The ONFI command 'parameter page read' needs a non-standard length.
8 Therefore, we enable the 'length override' field in NDCB0 and set
9 a non-zero 'length count' in NDCB3.
11 Additionally, the 'spare enable' bit must be disabled for any command
12 that sets a non-zero 'length count' in NDCB3.
14 Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
15 Tested-by: Daniel Mack <zonque@gmail.com>
16 Signed-off-by: Brian Norris <computersforpeace@gmail.com>
17 Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
19 drivers/mtd/nand/pxa3xx_nand.c | 6 ++++++
20 1 file changed, 6 insertions(+)
22 --- a/drivers/mtd/nand/pxa3xx_nand.c
23 +++ b/drivers/mtd/nand/pxa3xx_nand.c
25 #define NDSR_RDDREQ (0x1 << 1)
26 #define NDSR_WRCMDREQ (0x1)
28 +#define NDCB0_LEN_OVRD (0x1 << 28)
29 #define NDCB0_ST_ROW_EN (0x1 << 26)
30 #define NDCB0_AUTO_RS (0x1 << 25)
31 #define NDCB0_CSEL (0x1 << 24)
32 @@ -562,6 +563,9 @@ static int prepare_command_pool(struct p
33 case NAND_CMD_READOOB:
34 pxa3xx_set_datasize(info);
36 + case NAND_CMD_PARAM:
37 + info->use_spare = 0;
42 @@ -637,8 +641,10 @@ static int prepare_command_pool(struct p
43 info->buf_count = 256;
44 info->ndcb0 |= NDCB0_CMD_TYPE(0)
48 info->ndcb1 = (column & 0xFF);
50 info->data_size = 256;