1 From: Gregory CLEMENT <gregory.clement@free-electrons.com>
2 Date: Thu, 4 Feb 2016 22:09:27 +0100
3 Subject: [PATCH] net: mvneta: Modify the queue related fields from each cpu
5 In the MVNETA_INTR_* registers, the queues related fields are per cpu,
6 according to the datasheet (comment in [] are added by me):
7 "In a multi-CPU system, bits of RX[or TX] queues for which the access by
8 the reading[or writing] CPU is disabled are read as 0, and cannot be
11 That means that each time we want to manipulate these bits we had to do
12 it on each cpu and not only on the current cpu.
14 Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
15 Signed-off-by: David S. Miller <davem@davemloft.net>
18 --- a/drivers/net/ethernet/marvell/mvneta.c
19 +++ b/drivers/net/ethernet/marvell/mvneta.c
20 @@ -1036,6 +1036,43 @@ static void mvneta_set_autoneg(struct mv
24 +static void mvneta_percpu_unmask_interrupt(void *arg)
26 + struct mvneta_port *pp = arg;
28 + /* All the queue are unmasked, but actually only the ones
29 + * mapped to this CPU will be unmasked
31 + mvreg_write(pp, MVNETA_INTR_NEW_MASK,
32 + MVNETA_RX_INTR_MASK_ALL |
33 + MVNETA_TX_INTR_MASK_ALL |
34 + MVNETA_MISCINTR_INTR_MASK);
37 +static void mvneta_percpu_mask_interrupt(void *arg)
39 + struct mvneta_port *pp = arg;
41 + /* All the queue are masked, but actually only the ones
42 + * mapped to this CPU will be masked
44 + mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
45 + mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
46 + mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
49 +static void mvneta_percpu_clear_intr_cause(void *arg)
51 + struct mvneta_port *pp = arg;
53 + /* All the queue are cleared, but actually only the ones
54 + * mapped to this CPU will be cleared
56 + mvreg_write(pp, MVNETA_INTR_NEW_CAUSE, 0);
57 + mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
58 + mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0);
61 /* This method sets defaults to the NETA port:
62 * Clears interrupt Cause and Mask registers.
63 * Clears all MAC tables.
64 @@ -1053,14 +1090,10 @@ static void mvneta_defaults_set(struct m
65 int max_cpu = num_present_cpus();
67 /* Clear all Cause registers */
68 - mvreg_write(pp, MVNETA_INTR_NEW_CAUSE, 0);
69 - mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0);
70 - mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
71 + on_each_cpu(mvneta_percpu_clear_intr_cause, pp, true);
73 /* Mask all interrupts */
74 - mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
75 - mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
76 - mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
77 + on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
78 mvreg_write(pp, MVNETA_INTR_ENABLE, 0);
80 /* Enable MBUS Retry bit16 */
81 @@ -2526,31 +2559,6 @@ static int mvneta_setup_txqs(struct mvne
85 -static void mvneta_percpu_unmask_interrupt(void *arg)
87 - struct mvneta_port *pp = arg;
89 - /* All the queue are unmasked, but actually only the ones
90 - * maped to this CPU will be unmasked
92 - mvreg_write(pp, MVNETA_INTR_NEW_MASK,
93 - MVNETA_RX_INTR_MASK_ALL |
94 - MVNETA_TX_INTR_MASK_ALL |
95 - MVNETA_MISCINTR_INTR_MASK);
98 -static void mvneta_percpu_mask_interrupt(void *arg)
100 - struct mvneta_port *pp = arg;
102 - /* All the queue are masked, but actually only the ones
103 - * maped to this CPU will be masked
105 - mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
106 - mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
107 - mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
110 static void mvneta_start_dev(struct mvneta_port *pp)
113 @@ -2601,13 +2609,10 @@ static void mvneta_stop_dev(struct mvnet
114 mvneta_port_disable(pp);
116 /* Clear all ethernet port interrupts */
117 - mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
118 - mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0);
119 + on_each_cpu(mvneta_percpu_clear_intr_cause, pp, true);
121 /* Mask all ethernet port interrupts */
122 - mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
123 - mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
124 - mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
125 + on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
129 @@ -2919,9 +2924,7 @@ static int mvneta_percpu_notifier(struct
132 /* Mask all ethernet port interrupts */
133 - mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
134 - mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
135 - mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
136 + on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
137 napi_enable(&port->napi);
140 @@ -2936,14 +2939,8 @@ static int mvneta_percpu_notifier(struct
142 mvneta_percpu_elect(pp);
144 - /* Unmask all ethernet port interrupts, as this
145 - * notifier is called for each CPU then the CPU to
146 - * Queue mapping is applied
148 - mvreg_write(pp, MVNETA_INTR_NEW_MASK,
149 - MVNETA_RX_INTR_MASK(rxq_number) |
150 - MVNETA_TX_INTR_MASK(txq_number) |
151 - MVNETA_MISCINTR_INTR_MASK);
152 + /* Unmask all ethernet port interrupts */
153 + on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true);
154 mvreg_write(pp, MVNETA_INTR_MISC_MASK,
155 MVNETA_CAUSE_PHY_STATUS_CHANGE |
156 MVNETA_CAUSE_LINK_CHANGE |
157 @@ -2954,9 +2951,7 @@ static int mvneta_percpu_notifier(struct
158 case CPU_DOWN_PREPARE_FROZEN:
159 netif_tx_stop_all_queues(pp->dev);
160 /* Mask all ethernet port interrupts */
161 - mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
162 - mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
163 - mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
164 + on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
166 napi_synchronize(&port->napi);
167 napi_disable(&port->napi);
168 @@ -2972,10 +2967,7 @@ static int mvneta_percpu_notifier(struct
169 /* Check if a new CPU must be elected now this on is down */
170 mvneta_percpu_elect(pp);
171 /* Unmask all ethernet port interrupts */
172 - mvreg_write(pp, MVNETA_INTR_NEW_MASK,
173 - MVNETA_RX_INTR_MASK(rxq_number) |
174 - MVNETA_TX_INTR_MASK(txq_number) |
175 - MVNETA_MISCINTR_INTR_MASK);
176 + on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true);
177 mvreg_write(pp, MVNETA_INTR_MISC_MASK,
178 MVNETA_CAUSE_PHY_STATUS_CHANGE |
179 MVNETA_CAUSE_LINK_CHANGE |