1 From cd834fe430f030a63bfa9277bba194e8eef4dbd0 Mon Sep 17 00:00:00 2001
2 From: Russell King <rmk+kernel@arm.linux.org.uk>
3 Date: Sun, 20 Sep 2015 10:18:59 +0100
4 Subject: [PATCH 710/744] phy: convert swphy register generation to tabular
7 Convert the swphy register generation to tabular form which allows us
8 to eliminate multiple switch() statements. This results in a smaller
9 object code size, more efficient, and easier to add support for faster
14 Idx Name Size VMA LMA File off Algn
15 0 .text 00000164 00000000 00000000 00000034 2**2
17 text data bss dec hex filename
18 388 0 0 388 184 swphy.o
22 Idx Name Size VMA LMA File off Algn
23 0 .text 000000fc 00000000 00000000 00000034 2**2
24 5 .rodata 00000028 00000000 00000000 00000138 2**2
26 text data bss dec hex filename
27 324 0 0 324 144 swphy.o
29 Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
30 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
32 drivers/net/phy/swphy.c | 143 ++++++++++++++++++++++++++----------------------
33 1 file changed, 78 insertions(+), 65 deletions(-)
35 --- a/drivers/net/phy/swphy.c
36 +++ b/drivers/net/phy/swphy.c
52 + SWMII_DUPLEX_HALF = 0,
57 + * These two tables get bitwise-anded together to produce the final result.
58 + * This means the speed table must contain both duplex settings, and the
59 + * duplex table must contain all speed settings.
61 +static const struct swmii_regs speed[] = {
62 + [SWMII_SPEED_10] = {
63 + .bmcr = BMCR_FULLDPLX,
64 + .lpa = LPA_10FULL | LPA_10HALF,
66 + [SWMII_SPEED_100] = {
67 + .bmcr = BMCR_FULLDPLX | BMCR_SPEED100,
68 + .bmsr = BMSR_100FULL | BMSR_100HALF,
69 + .lpa = LPA_100FULL | LPA_100HALF,
71 + [SWMII_SPEED_1000] = {
72 + .bmcr = BMCR_FULLDPLX | BMCR_SPEED1000,
73 + .bmsr = BMSR_ESTATEN,
74 + .lpagb = LPA_1000FULL | LPA_1000HALF,
78 +static const struct swmii_regs duplex[] = {
79 + [SWMII_DUPLEX_HALF] = {
80 + .bmcr = ~BMCR_FULLDPLX,
81 + .bmsr = BMSR_ESTATEN | BMSR_100HALF,
82 + .lpa = LPA_10HALF | LPA_100HALF,
83 + .lpagb = LPA_1000HALF,
85 + [SWMII_DUPLEX_FULL] = {
87 + .bmsr = BMSR_ESTATEN | BMSR_100FULL,
88 + .lpa = LPA_10FULL | LPA_100FULL,
89 + .lpagb = LPA_1000FULL,
93 +static int swphy_decode_speed(int speed)
97 + return SWMII_SPEED_1000;
99 + return SWMII_SPEED_100;
101 + return SWMII_SPEED_10;
108 * swphy_update_regs - update MII register array with fixed phy state
109 * @regs: array of 32 registers to update
112 int swphy_update_regs(u16 *regs, const struct fixed_phy_status *state)
114 + int speed_index, duplex_index;
115 u16 bmsr = BMSR_ANEGCAPABLE;
120 - if (state->duplex) {
121 - switch (state->speed) {
123 - bmsr |= BMSR_ESTATEN;
126 - bmsr |= BMSR_100FULL;
129 - bmsr |= BMSR_10FULL;
135 - switch (state->speed) {
137 - bmsr |= BMSR_ESTATEN;
140 - bmsr |= BMSR_100HALF;
143 - bmsr |= BMSR_10HALF;
148 + speed_index = swphy_decode_speed(state->speed);
149 + if (speed_index < 0) {
150 + pr_warn("swphy: unknown speed\n");
154 + duplex_index = state->duplex ? SWMII_DUPLEX_FULL : SWMII_DUPLEX_HALF;
156 + bmsr |= speed[speed_index].bmsr & duplex[duplex_index].bmsr;
159 bmsr |= BMSR_LSTATUS | BMSR_ANEGCOMPLETE;
161 - if (state->duplex) {
162 - bmcr |= BMCR_FULLDPLX;
164 - switch (state->speed) {
166 - bmcr |= BMCR_SPEED1000;
167 - lpagb |= LPA_1000FULL;
170 - bmcr |= BMCR_SPEED100;
171 - lpa |= LPA_100FULL;
177 - pr_warn("swphy: unknown speed\n");
181 - switch (state->speed) {
183 - bmcr |= BMCR_SPEED1000;
184 - lpagb |= LPA_1000HALF;
187 - bmcr |= BMCR_SPEED100;
188 - lpa |= LPA_100HALF;
194 - pr_warn("swphy: unknown speed\n");
198 + bmcr |= speed[speed_index].bmcr & duplex[duplex_index].bmcr;
199 + lpa |= speed[speed_index].lpa & duplex[duplex_index].lpa;
200 + lpagb |= speed[speed_index].lpagb & duplex[duplex_index].lpagb;
203 lpa |= LPA_PAUSE_CAP;