1 /* Copyright OpenWrt.org (C) 2015.
2 * Copyright Altera Corporation (C) 2014. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License, version 2,
6 * as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 * Adopted from dwmac-socfpga.c
17 * Based on code found in mach-oxnas.c
20 #include <linux/mfd/syscon.h>
22 #include <linux/of_address.h>
23 #include <linux/of_net.h>
24 #include <linux/phy.h>
25 #include <linux/regmap.h>
26 #include <linux/reset.h>
27 #include <linux/stmmac.h>
29 #include <mach/hardware.h>
32 #include "stmmac_platform.h"
38 static int oxnas_gmac_init(struct platform_device
*pdev
, void *priv
)
40 struct oxnas_gmac
*bsp_priv
= priv
;
44 ret
= device_reset(&pdev
->dev
);
48 if (IS_ERR(bsp_priv
->clk
))
49 return PTR_ERR(bsp_priv
->clk
);
50 clk_prepare_enable(bsp_priv
->clk
);
52 value
= readl(SYS_CTRL_GMAC_CTRL
);
54 /* Enable GMII_GTXCLK to follow GMII_REFCLK, required for gigabit PHY */
55 value
|= BIT(SYS_CTRL_GMAC_CKEN_GTX
);
56 /* Use simple mux for 25/125 Mhz clock switching */
57 value
|= BIT(SYS_CTRL_GMAC_SIMPLE_MUX
);
58 /* set auto switch tx clock source */
59 value
|= BIT(SYS_CTRL_GMAC_AUTO_TX_SOURCE
);
60 /* enable tx & rx vardelay */
61 value
|= BIT(SYS_CTRL_GMAC_CKEN_TX_OUT
);
62 value
|= BIT(SYS_CTRL_GMAC_CKEN_TXN_OUT
);
63 value
|= BIT(SYS_CTRL_GMAC_CKEN_TX_IN
);
64 value
|= BIT(SYS_CTRL_GMAC_CKEN_RX_OUT
);
65 value
|= BIT(SYS_CTRL_GMAC_CKEN_RXN_OUT
);
66 value
|= BIT(SYS_CTRL_GMAC_CKEN_RX_IN
);
67 writel(value
, SYS_CTRL_GMAC_CTRL
);
69 /* set tx & rx vardelay */
71 value
|= SYS_CTRL_GMAC_TX_VARDELAY(4);
72 value
|= SYS_CTRL_GMAC_TXN_VARDELAY(2);
73 value
|= SYS_CTRL_GMAC_RX_VARDELAY(10);
74 value
|= SYS_CTRL_GMAC_RXN_VARDELAY(8);
75 writel(value
, SYS_CTRL_GMAC_DELAY_CTRL
);
80 static void oxnas_gmac_exit(struct platform_device
*pdev
, void *priv
)
82 struct reset_control
*rstc
;
84 clk_disable_unprepare(priv
);
85 devm_clk_put(&pdev
->dev
, priv
);
87 rstc
= reset_control_get(&pdev
->dev
, NULL
);
89 reset_control_assert(rstc
);
90 reset_control_put(rstc
);
94 static int oxnas_gmac_probe(struct platform_device
*pdev
)
96 struct plat_stmmacenet_data
*plat_dat
;
97 struct stmmac_resources stmmac_res
;
99 struct device
*dev
= &pdev
->dev
;
100 struct oxnas_gmac
*bsp_priv
;
102 bsp_priv
= devm_kzalloc(dev
, sizeof(*bsp_priv
), GFP_KERNEL
);
105 bsp_priv
->clk
= devm_clk_get(dev
, "gmac");
106 if (IS_ERR(bsp_priv
->clk
))
107 return PTR_ERR(bsp_priv
->clk
);
109 ret
= stmmac_get_platform_resources(pdev
, &stmmac_res
);
113 plat_dat
= stmmac_probe_config_dt(pdev
, &stmmac_res
.mac
);
114 if (IS_ERR(plat_dat
))
115 return PTR_ERR(plat_dat
);
117 plat_dat
->bsp_priv
= bsp_priv
;
118 plat_dat
->init
= oxnas_gmac_init
;
119 plat_dat
->exit
= oxnas_gmac_exit
;
121 ret
= oxnas_gmac_init(pdev
, bsp_priv
);
125 return stmmac_dvr_probe(dev
, plat_dat
, &stmmac_res
);
128 static const struct of_device_id oxnas_gmac_match
[] = {
129 { .compatible
= "plxtech,nas782x-gmac" },
132 MODULE_DEVICE_TABLE(of
, oxnas_gmac_match
);
134 static struct platform_driver oxnas_gmac_driver
= {
135 .probe
= oxnas_gmac_probe
,
136 .remove
= stmmac_pltfr_remove
,
138 .name
= "oxnas-gmac",
139 .pm
= &stmmac_pltfr_pm_ops
,
140 .of_match_table
= oxnas_gmac_match
,
143 module_platform_driver(oxnas_gmac_driver
);
145 MODULE_LICENSE("GPL v2");