ipq807x: add support for CMCC RM2-6
[openwrt/staging/jow.git] / target / linux / qualcommax / files / arch / arm64 / boot / dts / qcom / ipq8070-rm2-6.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 /dts-v1/;
4
5 #include "ipq8074-512m.dtsi"
6 #include "ipq8074-ac-cpu.dtsi"
7 #include "ipq8074-ess.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11
12 / {
13 model = "CMCC RM2-6";
14 compatible = "cmcc,rm2-6", "qcom,ipq8074";
15
16 aliases {
17 serial0 = &blsp1_uart5;
18 serial1 = &blsp1_uart3;
19 led-boot = &led_status_red;
20 led-failsafe = &led_status_red;
21 led-running = &led_status_blue;
22 led-upgrade = &led_status_amber;
23 /*
24 * Aliases as required by u-boot
25 * to patch MAC addresses
26 */
27 ethernet0 = &dp4;
28 ethernet1 = &dp2;
29 ethernet2 = &dp5;
30 label-mac-device = &dp4;
31 };
32
33 chosen {
34 stdout-path = "serial0:115200n8";
35 bootargs-append = " root=/dev/ubiblock0_1";
36 };
37
38 keys {
39 compatible = "gpio-keys";
40
41 wps {
42 label = "wps";
43 linux,code = <KEY_WPS_BUTTON>;
44 gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
45 };
46
47 reset {
48 label = "reset";
49 linux,code = <KEY_RESTART>;
50 gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
51 };
52 };
53
54 leds {
55 compatible = "gpio-leds";
56
57 led_status_amber: status-amber {
58 color = <LED_COLOR_ID_AMBER>;
59 function = LED_FUNCTION_STATUS;
60 gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>;
61 };
62
63 led_status_blue: status-blue {
64 color = <LED_COLOR_ID_BLUE>;
65 function = LED_FUNCTION_STATUS;
66 gpio = <&tlmm 26 GPIO_ACTIVE_HIGH>;
67 };
68
69 led_status_red: status-red {
70 color = <LED_COLOR_ID_RED>;
71 function = LED_FUNCTION_STATUS;
72 gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>;
73 };
74 };
75
76 fan: gpio-fan {
77 #cooling-cells = <2>;
78 compatible = "gpio-fan";
79 gpio = <&tlmm 29 GPIO_ACTIVE_HIGH>;
80 gpio-fan,speed-map = <0 0>, <1 1>;
81 };
82 };
83
84 &tlmm {
85 mdio_pins: mdio-pins {
86 mdc {
87 pins = "gpio68";
88 function = "mdc";
89 drive-strength = <8>;
90 bias-pull-up;
91 };
92
93 mdio {
94 pins = "gpio69";
95 function = "mdio";
96 drive-strength = <8>;
97 bias-pull-up;
98 };
99 };
100 };
101
102 &blsp1_uart3 {
103 status = "okay";
104 };
105
106 &blsp1_uart5 {
107 status = "okay";
108 };
109
110 &cryptobam {
111 status = "okay";
112 };
113
114 &crypto {
115 status = "okay";
116 };
117
118 &prng {
119 status = "okay";
120 };
121
122 &qpic_bam {
123 status = "okay";
124 };
125
126 &qpic_nand {
127 status = "okay";
128
129 nand@0 {
130 reg = <0>;
131 nand-ecc-strength = <8>;
132 nand-ecc-step-size = <512>;
133 nand-bus-width = <8>;
134
135 partitions {
136 compatible = "qcom,smem-part";
137 };
138 };
139 };
140
141 &cpu0_thermal {
142 trips {
143 cpu0_trip_active: cpu-active {
144 temperature = <60000>;
145 hysteresis = <2000>;
146 type = "active";
147 };
148 };
149
150 cooling-maps {
151 cpu-active {
152 cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
153 trip = <&cpu0_trip_active>;
154 };
155 };
156 };
157
158 &cpu1_thermal {
159 trips {
160 cpu1_trip_active: cpu-active {
161 temperature = <60000>;
162 hysteresis = <2000>;
163 type = "active";
164 };
165 };
166
167 cooling-maps {
168 cpu-active {
169 cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
170 trip = <&cpu1_trip_active>;
171 };
172 };
173 };
174
175 &cpu2_thermal {
176 trips {
177 cpu2_trip_active: cpu-active {
178 temperature = <60000>;
179 hysteresis = <2000>;
180 type = "active";
181 };
182 };
183
184 cooling-maps {
185 cpu-active {
186 cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
187 trip = <&cpu2_trip_active>;
188 };
189 };
190 };
191
192 &cpu3_thermal {
193 trips {
194 cpu3_trip_active: cpu-active {
195 temperature = <60000>;
196 hysteresis = <2000>;
197 type = "active";
198 };
199 };
200
201 cooling-maps {
202 cpu-active {
203 cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
204 trip = <&cpu3_trip_active>;
205 };
206 };
207 };
208
209 &cluster_thermal {
210 trips {
211 cluster_active: cluster-active {
212 temperature = <60000>;
213 hysteresis = <2000>;
214 type = "active";
215 };
216 };
217
218 cooling-maps {
219 cluster-active {
220 cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
221 trip = <&cluster_active>;
222 };
223 };
224 };
225
226 &mdio {
227 status = "okay";
228
229 pinctrl-0 = <&mdio_pins>;
230 pinctrl-names = "default";
231 reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
232
233 ethernet-phy-package@0 {
234 compatible = "qcom,qca8075-package";
235 #address-cells = <1>;
236 #size-cells = <0>;
237 reg = <0>;
238
239 qca8075_1: ethernet-phy@1 {
240 compatible = "ethernet-phy-ieee802.3-c22";
241 reg = <1>;
242 };
243
244 qca8075_3: ethernet-phy@3 {
245 compatible = "ethernet-phy-ieee802.3-c22";
246 reg = <3>;
247 };
248
249 qca8075_4: ethernet-phy@4 {
250 compatible = "ethernet-phy-ieee802.3-c22";
251 reg = <4>;
252 };
253 };
254 };
255
256 &switch {
257 status = "okay";
258
259 switch_lan_bmp = <(ESS_PORT2 | ESS_PORT4)>;
260 switch_wan_bmp = <ESS_PORT5>;
261 switch_mac_mode = <MAC_MODE_PSGMII>;
262
263 qcom,port_phyinfo {
264 port@2 {
265 port_id = <2>;
266 phy_address = <1>;
267 };
268 port@4 {
269 port_id = <4>;
270 phy_address = <3>;
271 };
272 port@5 {
273 port_id = <5>;
274 phy_address = <4>;
275 };
276 };
277 };
278
279 &edma {
280 status = "okay";
281 };
282
283 /*
284 * Directly connect to the Hi5630
285 * PLC (Power Line Communication)
286 */
287 &dp2 {
288 status = "okay";
289 phy-handle = <&qca8075_1>;
290 label = "plc";
291 };
292
293 &dp4 {
294 status = "okay";
295 phy-handle = <&qca8075_3>;
296 label = "lan";
297 };
298
299 &dp5 {
300 status = "okay";
301 phy-handle = <&qca8075_4>;
302 label = "wan";
303 };
304
305 &wifi {
306 status = "okay";
307
308 qcom,ath11k-calibration-variant = "CMCC-RM2-6";
309 qcom,ath11k-fw-memory-mode = <1>;
310 };