1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /* Copyright (c) 2022, Matthew Hagan <mnhagan88@gmail.com> */
6 #include "ipq8074.dtsi"
7 #include "ipq8074-ac-cpu.dtsi"
8 #include "ipq8074-ess.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
13 model = "Edgecore EAP102";
14 compatible = "edgecore,eap102", "qcom,ipq8074";
17 serial0 = &blsp1_uart5;
18 serial1 = &blsp1_uart3;
19 led-boot = &led_system_green;
20 led-failsafe = &led_system_green;
21 led-running = &led_system_green;
22 led-upgrade = &led_system_green;
23 /* Aliases as required by u-boot to patch MAC addresses */
26 label-mac-device = &dp5;
30 stdout-path = "serial0:115200n8";
31 bootargs-append = " root=/dev/ubiblock0_1";
35 compatible = "gpio-keys";
36 pinctrl-0 = <&button_pins>;
37 pinctrl-names = "default";
41 gpios = <&tlmm 66 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_RESTART>;
47 compatible = "gpio-leds";
50 label = "green:wanpoe";
51 gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
55 label = "green:wlan2g";
56 gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>;
57 linux,default-trigger = "phy1radio";
61 label = "green:wlan5g";
62 gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
63 linux,default-trigger = "phy0radio";
66 led_system_green: led_system {
67 label = "green:power";
68 gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
74 mdio_pins: mdio-pins {
90 button_pins: button_pins {
104 #address-cells = <1>;
107 compatible = "jedec,spi-nor";
108 spi-max-frequency = <50000000>;
111 compatible = "fixed-partitions";
112 #address-cells = <1>;
123 reg = <0x50000 0x10000>;
128 label = "0:bootconfig";
129 reg = <0x60000 0x20000>;
134 label = "0:bootconfig1";
135 reg = <0x80000 0x20000>;
141 reg = <0xa0000 0x180000>;
147 reg = <0x220000 0x180000>;
153 reg = <0x3a0000 0x10000>;
158 label = "0:devcfg_1";
159 reg = <0x3b0000 0x10000>;
165 reg = <0x3c0000 0x10000>;
171 reg = <0x3d0000 0x10000>;
177 reg = <0x3e0000 0x40000>;
183 reg = <0x420000 0x40000>;
189 reg = <0x460000 0x10000>;
195 reg = <0x470000 0x10000>;
200 label = "0:appsblenv";
201 reg = <0x480000 0x10000>;
206 reg = <0x490000 0xc0000>;
211 label = "0:appsbl_1";
212 reg = <0x530000 0xc0000>;
218 reg = <0x610000 0x40000>;
223 label = "0:ethphyfw";
224 reg = <0x650000 0x80000>;
229 label = "0:product_info";
230 reg = <0x6d0000 0x80000>;
235 label = "priv_data1";
236 reg = <0x750000 0x10000>;
241 label = "priv_data2";
242 reg = <0x760000 0x10000>;
290 nand-ecc-strength = <8>;
291 nand-ecc-step-size = <512>;
292 nand-bus-width = <8>;
295 compatible = "fixed-partitions";
296 #address-cells = <1>;
301 reg = <0x0000000 0x3400000>;
306 reg = <0x3400000 0x800000>;
312 reg = <0x3c00000 0x3400000>;
316 label = "0:wififw_1";
317 reg = <0x7000000 0x800000>;
327 pinctrl-0 = <&mdio_pins>;
328 pinctrl-names = "default";
330 qca8081_24: ethernet-phy@24 {
331 compatible = "ethernet-phy-id004d.d101";
333 reset-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
336 qca8081_28: ethernet-phy@28 {
337 compatible = "ethernet-phy-id004d.d101";
339 reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
346 switch_lan_bmp = <ESS_PORT5>; /* lan port bitmap */
347 switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */
348 switch_mac_mode1 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance1*/
349 switch_mac_mode2 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance2*/
355 port_mac_sel = "QGMAC_PORT";
360 port_mac_sel = "QGMAC_PORT";
371 phy-handle = <&qca8081_24>;
377 phy-handle = <&qca8081_28>;
384 qcom,ath11k-calibration-variant = "Edgecore-EAP102";