1 // SPDX-License-Identifier: MIT, GPL-2.0 or later
2 /* Copyright (c) 2023, Ruslan Isaev <legale.legale@gmail.com> */
6 #include "ipq8074.dtsi"
7 #include "ipq8074-hk-cpu.dtsi"
8 #include "ipq8074-ess.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
13 model = "Yuncore AX880";
14 compatible = "yuncore,ax880", "qcom,ipq8074", "qcom,ipq8074-hk09";
17 serial0 = &blsp1_uart5;
18 serial1 = &blsp1_uart3;
19 led-boot = &led_system;
20 led-failsafe = &led_system;
21 led-running = &led_system;
22 led-upgrade = &led_system;
23 /* Aliases as required by u-boot to patch MAC addresses */
26 label-mac-device = &dp5_syn;
30 stdout-path = "serial0:115200n8";
31 bootargs-append = " root=/dev/ubiblock0_1";
35 compatible = "gpio-keys";
36 pinctrl-0 = <&button_pins>;
37 pinctrl-names = "default";
41 gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_RESTART>;
47 compatible = "gpio-leds";
52 gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
58 linux,default-trigger = "phy0tpt";
59 gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
65 linux,default-trigger = "phy1tpt";
66 gpios = <&tlmm 9 GPIO_ACTIVE_HIGH>;
72 mdio_pins: mdio-pins {
88 button_pins: button_pins {
102 #address-cells = <1>;
105 compatible = "jedec,spi-nor";
106 spi-max-frequency = <50000000>;
109 compatible = "fixed-partitions";
110 #address-cells = <1>;
121 reg = <0x50000 0x10000>;
126 label = "0:bootconfig";
127 reg = <0x60000 0x20000>;
132 label = "0:bootconfig1";
133 reg = <0x80000 0x20000>;
139 reg = <0xa0000 0x180000>;
145 reg = <0x220000 0x180000>;
151 reg = <0x3a0000 0x10000>;
156 label = "0:devcfg_1";
157 reg = <0x3b0000 0x10000>;
163 reg = <0x3c0000 0x10000>;
169 reg = <0x3d0000 0x10000>;
175 reg = <0x3e0000 0x40000>;
181 reg = <0x420000 0x40000>;
187 reg = <0x460000 0x10000>;
193 reg = <0x470000 0x10000>;
198 label = "0:appsblenv";
199 reg = <0x480000 0x10000>;
203 label = "0:appsbl_1";
204 reg = <0x490000 0xa0000>;
210 reg = <0x530000 0xa0000>;
216 reg = <0x5d0000 0x40000>;
221 label = "0:ethphyfw";
222 reg = <0x610000 0x80000>;
272 nand-ecc-strength = <4>;
273 nand-ecc-step-size = <512>;
274 nand-bus-width = <8>;
277 compatible = "fixed-partitions";
278 #address-cells = <1>;
283 reg = <0x0000000 0x3400000>;
288 reg = <0x3400000 0x800000>;
292 rootfs: partition@3c00000 {
294 reg = <0x3c00000 0x3400000>;
298 label = "0:wififw_1";
299 reg = <0x7000000 0x800000>;
309 pinctrl-0 = <&mdio_pins>;
310 pinctrl-names = "default";
312 qca8081_24: ethernet-phy@24 {
313 compatible = "ethernet-phy-id004d.d101";
315 reset-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
318 qca8081_28: ethernet-phy@28 {
319 compatible = "ethernet-phy-id004d.d101";
321 reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
328 switch_lan_bmp = <ESS_PORT5>; /* lan port bitmap */
329 switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */
330 switch_mac_mode1 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance1*/
331 switch_mac_mode2 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance2*/
332 bm_tick_mode = <0>; /* bm tick mode */
333 tm_tick_mode = <0>; /* tm tick mode */
339 port_mac_sel = "QGMAC_PORT";
344 port_mac_sel = "QGMAC_PORT";
355 phy-handle = <&qca8081_24>;
361 phy-handle = <&qca8081_28>;
367 qcom,ath11k-calibration-variant = "Yuncore-AX880";