1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 #include "ipq8074.dtsi"
6 #include "ipq8074-hk-cpu.dtsi"
7 #include "ipq8074-ess.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
13 model = "prpl Foundation Haze";
14 compatible = "prpl,haze", "qcom,ipq8074";
17 serial0 = &blsp1_uart5;
18 /* Aliases are required by U-Boot to patch MAC addresses */
23 label-mac-device = &dp6_syn;
27 stdout-path = "serial0:115200n8";
31 compatible = "gpio-keys";
32 pinctrl-0 = <&button_pins>;
33 pinctrl-names = "default";
37 gpios = <&tlmm 42 GPIO_ACTIVE_LOW>;
38 linux,code = <KEY_WPS_BUTTON>;
43 gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
44 linux,code = <KEY_RESTART>;
50 mdio_pins: mdio-state {
66 button_pins: button-state {
127 &blsp1_spi1 { /* BLSP1 QUP1 */
128 pinctrl-0 = <&spi_0_pins>;
129 pinctrl-names = "default";
134 #address-cells = <1>;
137 compatible = "jedec,spi-nor";
138 spi-max-frequency = <50000000>;
141 compatible = "qcom,smem-part";
149 pinctrl-0 = <&mdio_pins>;
150 pinctrl-names = "default";
151 reset-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
153 qca8075_1: ethernet-phy@0 {
154 compatible = "ethernet-phy-ieee802.3-c22";
158 qca8075_2: ethernet-phy@1 {
159 compatible = "ethernet-phy-ieee802.3-c22";
163 qca8075_3: ethernet-phy@2 {
164 compatible = "ethernet-phy-ieee802.3-c22";
168 qca8075_4: ethernet-phy@3 {
169 compatible = "ethernet-phy-ieee802.3-c22";
173 aqr113c: ethernet-phy@5 {
174 compatible ="ethernet-phy-ieee802.3-c45";
176 reset-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
183 vqmmc-supply = <&l11>;
189 switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4)>; /* lan port bitmap */
190 switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */
191 switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
192 switch_mac_mode1 = <0xe>; /* mac mode for uniphy instance1*/
193 switch_mac_mode2 = <0xd>; /* mac mode for uniphy instance2*/
194 bm_tick_mode = <0>; /* bm tick mode */
195 tm_tick_mode = <0>; /* tm tick mode */
217 compatible = "ethernet-phy-ieee802.3-c45";
218 ethernet-phy-ieee802.3-c45;
230 phy-handle = <&qca8075_1>;
236 phy-handle = <&qca8075_2>;
242 phy-handle = <&qca8075_3>;
248 phy-handle = <&qca8075_4>;
255 phy-handle = <&aqr113c>;
266 perst-gpio = <&tlmm 58 GPIO_ACTIVE_LOW>;
269 reg = <0x00020000 0 0 0 0>;
270 #address-cells = <3>;
283 perst-gpio = <&tlmm 61 GPIO_ACTIVE_LOW>;
286 reg = <0x00010000 0 0 0 0>;
287 #address-cells = <3>;
294 /* ath11k has no DT compatible for PCI cards */
295 compatible = "pci17cb,1104";
296 reg = <0x00010000 0 0 0 0>;
298 qcom,ath11k-calibration-variant = "prpl-Haze";
306 qcom,ath11k-calibration-variant = "prpl-Haze";