1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright (c) 2022, Karol Przybylski <itor@o2.pl>
4 * Copyright (c) 2023, Andre Valentin <avalentin@marcant.net>
9 #include "ipq8074.dtsi"
10 #include "ipq8074-hk-cpu.dtsi"
11 #include "ipq8074-ess.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/input/input.h>
18 model = "Zyxel NBG7815";
19 compatible = "zyxel,nbg7815", "qcom,ipq8074";
22 serial0 = &blsp1_uart5;
23 serial1 = &blsp1_uart3;
24 /* Alias as required by u-boot to patch MAC addresses */
26 label-mac-device = &dp1;
30 stdout-path = "serial0:115200n8";
34 compatible = "gpio-keys";
38 linux,code = <KEY_RESTART>;
39 gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
45 mdio_pins: mdio-pins {
89 pinctrl-0 = <&spi_0_pins>;
90 pinctrl-names = "default";
95 * Bootloader will find the NAND DT node by the compatible and
96 * then "fixup" it by adding the partitions from the SMEM table
97 * using the legacy bindings thus making it impossible for us
98 * to change the partition table or utilize NVMEM for calibration.
99 * So add a dummy partitions node that bootloader will populate
100 * and set it as disabled so the kernel ignores it instead of
101 * printing warnings due to the broken way bootloader adds the
110 #address-cells = <1>;
113 compatible = "jedec,spi-nor";
114 spi-max-frequency = <50000000>;
117 compatible = "fixed-partitions";
118 #address-cells = <1>;
129 reg = <0x50000 0x10000>;
134 label = "0:bootconfig";
135 reg = <0x60000 0x20000>;
140 label = "0:bootconfig1";
141 reg = <0x80000 0x20000>;
147 reg = <0xa0000 0x180000>;
153 reg = <0x220000 0x180000>;
159 reg = <0x3a0000 0x10000>;
164 label = "0:devcfg_1";
165 reg = <0x3b0000 0x10000>;
171 reg = <0x3c0000 0x10000>;
177 reg = <0x3d0000 0x10000>;
183 reg = <0x3e0000 0x40000>;
189 reg = <0x420000 0x40000>;
195 reg = <0x460000 0x10000>;
201 reg = <0x470000 0x10000>;
207 reg = <0x480000 0xc0000>;
212 label = "0:appsbl_1";
213 reg = <0x540000 0xc0000>;
218 compatible = "u-boot,env";
219 label = "0:appsblenv";
220 reg = <0x600000 0x10000>;
222 macaddr_lan: ethaddr {
223 #nvmem-cell-cells = <1>;
229 reg = <0x610000 0x40000>;
234 label = "0:ethphyfw";
235 reg = <0x650000 0x80000>;
239 compatible = "fixed-layout";
242 /* Skip the QCOM MBN Header of 40 bytes */
243 reg = <0x28 0x5f402>;
250 reg = <0x6d0000 0x10000>;
256 reg = <0x6e0000 0x10000>;
261 reg = <0x6f0000 0x110000>;
270 pinctrl-0 = <&mdio_pins>;
271 pinctrl-names = "default";
272 reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
274 ethernet-phy-package@0 {
275 #address-cells = <1>;
277 compatible = "qcom,qca8075-package";
280 qca8075_0: ethernet-phy@0 {
281 compatible = "ethernet-phy-ieee802.3-c22";
285 qca8075_1: ethernet-phy@1 {
286 compatible = "ethernet-phy-ieee802.3-c22";
290 qca8075_2: ethernet-phy@2 {
291 compatible = "ethernet-phy-ieee802.3-c22";
295 qca8075_3: ethernet-phy@3 {
296 compatible = "ethernet-phy-ieee802.3-c22";
301 qca8081: ethernet-phy@28 {
302 compatible = "ethernet-phy-id004d.d101";
304 reset-deassert-us = <10000>;
305 reset-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
308 aqr113c: ethernet-phy@5 {
309 compatible = "ethernet-phy-ieee802.3-c45";
311 reset-gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
313 nvmem-cells = <&aqr_fw>;
314 nvmem-cell-names = "firmware";
321 switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT6)>;
322 switch_wan_bmp = <ESS_PORT5>;
323 switch_mac_mode = <MAC_MODE_PSGMII>;
324 switch_mac_mode1 = <MAC_MODE_SGMII_CHANNEL0>;
325 switch_mac_mode2 = <MAC_MODE_USXGMII>;
351 port_mac_sel = "QGMAC_PORT";
356 ethernet-phy-ieee802.3-c45;
368 phy-handle = <&qca8075_0>;
370 nvmem-cells = <&macaddr_lan 0>;
371 nvmem-cell-names = "mac-address";
376 phy-handle = <&qca8075_1>;
378 nvmem-cells = <&macaddr_lan 0>;
379 nvmem-cell-names = "mac-address";
384 phy-handle = <&qca8075_2>;
386 nvmem-cells = <&macaddr_lan 0>;
387 nvmem-cell-names = "mac-address";
392 phy-handle = <&qca8075_3>;
394 nvmem-cells = <&macaddr_lan 0>;
395 nvmem-cell-names = "mac-address";
400 phy-handle = <&qca8081>;
402 nvmem-cells = <&macaddr_lan 1>;
403 nvmem-cell-names = "mac-address";
408 phy-mode = "usxgmii";
409 phy-handle = <&aqr113c>;
411 nvmem-cells = <&macaddr_lan 0>;
412 nvmem-cell-names = "mac-address";
416 pinctrl-0 = <&i2c_0_pins>;
417 pinctrl-names = "default";
421 compatible = "ti,tmp103";
428 /* unstable, problem with the hs400 > h200 speed switch */
429 /delete-property/ mmc-hs400-1_8v;
432 vqmmc-supply = <&l11>;
462 qcom,ath11k-calibration-variant = "Zyxel-NBG7815";