1 #include "mt7620a.dtsi"
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/mtd/partitions/uimage.h>
9 compatible = "dlink,dwr-118-a2", "ralink,mt7620a-soc";
10 model = "D-Link DWR-118 A2";
13 led-boot = &led_internet;
14 led-failsafe = &led_internet;
18 compatible = "gpio-keys";
22 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
23 linux,code = <KEY_WPS_BUTTON>;
28 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
29 linux,code = <KEY_RESTART>;
34 compatible = "gpio-leds";
37 function = LED_FUNCTION_WAN;
38 color = <LED_COLOR_ID_GREEN>;
39 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
42 led_internet: internet {
43 label = "green:internet";
44 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
48 function = LED_FUNCTION_LAN;
49 color = <LED_COLOR_ID_GREEN>;
50 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
54 label = "green:wlan2g";
55 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
59 function = LED_FUNCTION_USB;
60 color = <LED_COLOR_ID_GREEN>;
61 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
62 trigger-sources = <&ohci_port1>, <&ehci_port1>;
63 linux,default-trigger = "usbport";
68 compatible = "gpio-export";
72 gpio-export,name = "usb";
73 gpio-export,output = <1>;
74 gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
95 compatible = "jedec,spi-nor";
97 spi-max-frequency = <50000000>;
100 compatible = "fixed-partitions";
101 #address-cells = <1>;
111 compatible = "openwrt,uimage", "denx,uimage";
112 openwrt,ih-magic = <IH_MAGIC_OKLI>;
113 openwrt,offset = <0x10000>;
115 reg = <0x10000 0xfe0000>;
118 config: partition@ff0000 {
120 reg = <0xff0000 0x10000>;
124 compatible = "fixed-layout";
125 #address-cells = <1>;
128 macaddr_config_e4a8: macaddr@e4a8 {
129 compatible = "mac-base";
131 #nvmem-cell-cells = <1>;
149 groups = "ephy", "uartf", "spi refclk", "wled";
160 reg = <0x0000 0 0 0 0>;
161 ieee80211-freq-limit = <5000000 6000000>;
162 nvmem-cells = <&macaddr_config_e4a8 2>;
163 nvmem-cell-names = "mac-address";
173 pinctrl-names = "default";
174 pinctrl-0 = <&rgmii1_pins &mdio_pins>;
176 mediatek,portmap = "wllll";
180 phy-handle = <&phy0>;
187 phy0: ethernet-phy@0 {
189 phy-mode = "rgmii-rxid";
196 mediatek,ephy-base = /bits/ 8 <2>;