1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "mt7620a.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/mtd/partitions/uimage.h>
10 compatible = "ralink,mt7620a-soc";
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
16 led-upgrade = &led_power;
20 compatible = "gpio-keys";
24 gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
25 linux,code = <KEY_RESTART>;
29 label = "switch high";
30 gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
32 linux,input-type = <EV_SW>;
37 gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
39 linux,input-type = <EV_SW>;
44 compatible = "gpio-leds";
47 label = "green:power";
48 gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
53 gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
57 label = "blue:wlan2g";
58 gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
59 linux,default-trigger = "phy1radio";
63 label = "blue:wlan5g";
64 gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
65 linux,default-trigger = "phy0radio";
70 gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
74 label = "green:crossband";
75 gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
92 compatible = "jedec,spi-nor";
94 spi-max-frequency = <10000000>;
97 compatible = "fixed-partitions";
108 label = "u-boot-env";
109 reg = <0x30000 0x10000>;
113 factory: partition@40000 {
115 reg = <0x40000 0x10000>;
121 reg = <0x50000 0x20000>;
126 compatible = "openwrt,uimage", "denx,uimage";
127 openwrt,offset = <FW_EDIMAX_OFFSET>;
128 openwrt,partition-magic = <FW_MAGIC_EDIMAX>;
130 reg = <0x00070000 0x00790000>;
138 groups = "i2c", "uartf", "nd_sd", "rgmii2";
144 phy_reset_pins: phy-reset {
146 groups = "spi refclk";
153 pinctrl-names = "default";
154 pinctrl-0 = <&rgmii1_pins &mdio_pins &phy_reset_pins>;
156 mtd-mac-address = <&factory 0x4>;
158 mediatek,mdio-mode = <1>;
160 phy-reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
161 phy-reset-duration = <30>;
165 mediatek,fixed-link = <1000 1 1 1>;
172 phy0: ethernet-phy@0 {
178 phy1: ethernet-phy@1 {
184 phy2: ethernet-phy@2 {
190 phy3: ethernet-phy@3 {
196 phy4: ethernet-phy@4 {
205 ralink,mtd-eeprom = <&factory 0x0>;
214 reg = <0x0000 0 0 0 0>;
215 mediatek,mtd-eeprom = <&factory 0x8000>;