1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "mt7620a.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
9 compatible = "engenius,epg600", "ralink,mt7620a-soc";
10 model = "EnGenius EPG600";
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
16 led-upgrade = &led_power;
20 bootargs = "console=ttyS0,115200";
24 compatible = "gpio-keys";
27 linux,code = <KEY_RESTART>;
28 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
29 debounce-interval = <60>;
33 linux,code = <KEY_WPS_BUTTON>;
34 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
35 debounce-interval = <60>;
40 gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
41 debounce-interval = <60>;
46 compatible = "gpio-leds";
49 label = "amber:power";
50 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
55 label = "blue:wlan2g";
56 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
57 linux,default-trigger = "phy1tpt";
61 label = "blue:wlan5g";
62 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
67 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
71 label = "amber:wps5g";
72 gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
77 gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
98 compatible = "jedec,spi-nor";
100 spi-max-frequency = <30000000>;
103 compatible = "fixed-partitions";
104 #address-cells = <1>;
114 label = "u-boot-env";
115 reg = <0x30000 0x10000>;
118 factory: partition@40000 {
120 reg = <0x40000 0x10000>;
124 rf: partition@50000 {
126 reg = <0x50000 0x10000>;
132 reg = <0x60000 0xf40000>;
133 compatible = "denx,uimage";
138 reg = <0xfa0000 0x10000>;
144 reg = <0xfb0000 0x50000>;
152 pinctrl-names = "default";
153 pinctrl-0 = <&mdio_pins &rgmii1_pins &rgmii2_pins>;
155 nvmem-cells = <&macaddr_rf_4>;
156 nvmem-cell-names = "mac-address";
161 phy-mode = "rgmii-txid";
163 mediatek,fixed-link = <1000 1 1 1>;
173 qca,ar8327-initvals = <
174 0x04 0x07600000 /* PORT0 PAD MODE CTRL */
175 0x08 0x01000000 /* PORT5 PAD MODE CTRL */
176 0x0c 0x07600000 /* PORT6 PAD MODE CTRL */
177 0x10 0x40000000 /* POWER-ON STRAPPING */
178 0x7c 0x0000007e /* PORT0_STATUS */
179 0x94 0x0000007e /* PORT6_STATUS */
186 mediatek,ephy-disable;
195 compatible = "pci1814,3091";
197 ralink,mtd-eeprom = <&factory 0x0>;
202 ralink,mtd-eeprom = <&rf 0x0>;
215 groups = "ephy", "wled", "spi refclk", "i2c", "uartf", "nd_sd";
221 compatible = "nvmem-cells";
222 #address-cells = <1>;
225 macaddr_rf_4: macaddr@4 {