1 // SPDX-License-Identifier: GPL-2.0-only
3 #include "mt7620a.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
9 compatible = "fon,fon2601", "ralink,mt7620a-soc";
10 model = "Fon FON2601";
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
16 led-upgrade = &led_power;
20 compatible = "gpio-leds";
24 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
28 label = "green:internet";
29 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
34 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
39 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
44 compatible = "gpio-keys";
48 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
49 linux,code = <KEY_RESTART>;
58 compatible = "jedec,spi-nor";
60 spi-max-frequency = <10000000>;
63 compatible = "fixed-partitions";
75 reg = <0x30000 0x10000>;
79 factory: partition@40000 {
81 reg = <0x40000 0x10000>;
86 compatible = "openwrt,uimage", "denx,uimage";
87 openwrt,padding = <32>;
89 reg = <0x50000 0xf90000>;
94 reg = <0xfe0000 0x20000>;
103 groups = "i2c", "uartf";
111 groups = "spi refclk";
112 function = "spi refclk";
117 pinctrl-names = "default";
118 pinctrl-0 = <&rgmii2_pins &mdio_pins>;
120 nvmem-cells = <&macaddr_factory_4>;
121 nvmem-cell-names = "mac-address";
125 phy-handle = <&phy4>;
132 phy4: ethernet-phy@4 {
141 mediatek,ephy-base = /bits/ 8 <8>;
145 ralink,mtd-eeprom = <&factory 0x0>;
147 pinctrl-names = "default", "pa_gpio";
148 pinctrl-0 = <&pa_pins>, <&wled_pins>;
149 pinctrl-1 = <&pa_gpio_pins>, <&wled_pins>;
157 compatible = "pci14c3,7662";
158 reg = <0x0000 0 0 0 0>;
159 mediatek,mtd-eeprom = <&factory 0x8000>;
160 ieee80211-freq-limit = <5000000 6000000>;
173 compatible = "nvmem-cells";
174 #address-cells = <1>;
177 macaddr_factory_4: macaddr@4 {