ramips: mt7628: use mac-base
[openwrt/staging/hauke.git] / target / linux / ramips / dts / mt7620a_fon_fon2601.dts
1 // SPDX-License-Identifier: GPL-2.0-only
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "fon,fon2601", "ralink,mt7620a-soc";
10 model = "Fon FON2601";
11
12 aliases {
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
16 led-upgrade = &led_power;
17 };
18
19 leds {
20 compatible = "gpio-leds";
21
22 led_power: power_r {
23 label = "red:power";
24 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
25 };
26
27 internet_g {
28 label = "green:internet";
29 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
30 };
31
32 net_g {
33 label = "green:net";
34 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
35 };
36
37 wifi_g {
38 label = "green:wifi";
39 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
40 };
41 };
42
43 keys {
44 compatible = "gpio-keys";
45
46 reset {
47 label = "reset";
48 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
49 linux,code = <KEY_RESTART>;
50 };
51 };
52 };
53
54 &spi0 {
55 status = "okay";
56
57 flash@0 {
58 compatible = "jedec,spi-nor";
59 reg = <0>;
60 spi-max-frequency = <10000000>;
61
62 partitions {
63 compatible = "fixed-partitions";
64 #address-cells = <1>;
65 #size-cells = <1>;
66
67 partition@0 {
68 label = "u-boot";
69 reg = <0x0 0x30000>;
70 read-only;
71 };
72
73 partition@30000 {
74 label = "u-boot-env";
75 reg = <0x30000 0x10000>;
76 read-only;
77 };
78
79 factory: partition@40000 {
80 compatible = "nvmem-cells";
81 label = "factory";
82 reg = <0x40000 0x10000>;
83 #address-cells = <1>;
84 #size-cells = <1>;
85 read-only;
86
87 eeprom_factory_0: eeprom@0 {
88 reg = <0x0 0x200>;
89 };
90
91 eeprom_factory_8000: eeprom@8000 {
92 reg = <0x8000 0x200>;
93 };
94
95 macaddr_factory_4: macaddr@4 {
96 reg = <0x4 0x6>;
97 };
98 };
99
100 partition@50000 {
101 compatible = "openwrt,uimage", "denx,uimage";
102 openwrt,padding = <32>;
103 label = "firmware";
104 reg = <0x50000 0xf90000>;
105 };
106
107 partition@fe0000 {
108 label = "board_data";
109 reg = <0xfe0000 0x20000>;
110 read-only;
111 };
112 };
113 };
114 };
115
116 &state_default {
117 gpio {
118 groups = "i2c", "uartf";
119 function = "gpio";
120 };
121 nd_sd {
122 groups = "nd_sd";
123 function = "sd";
124 };
125 spi_cs {
126 groups = "spi refclk";
127 function = "spi refclk";
128 };
129 };
130
131 &ethernet {
132 pinctrl-names = "default";
133 pinctrl-0 = <&rgmii2_pins &mdio_pins>;
134
135 nvmem-cells = <&macaddr_factory_4>;
136 nvmem-cell-names = "mac-address";
137
138 port@4 {
139 status = "okay";
140 phy-handle = <&phy4>;
141 phy-mode = "rgmii";
142 };
143
144 mdio-bus {
145 status = "okay";
146
147 phy4: ethernet-phy@4 {
148 reg = <4>;
149 phy-mode = "rgmii";
150 };
151 };
152 };
153
154 &gsw {
155 mediatek,port4-gmac;
156 mediatek,ephy-base = /bits/ 8 <8>;
157 };
158
159 &wmac {
160 nvmem-cells = <&eeprom_factory_0>;
161 nvmem-cell-names = "eeprom";
162
163 pinctrl-names = "default", "pa_gpio";
164 pinctrl-0 = <&pa_pins>, <&wled_pins>;
165 pinctrl-1 = <&pa_gpio_pins>, <&wled_pins>;
166 };
167
168 &pcie {
169 status = "okay";
170 };
171 &pcie0 {
172 wifi@0,0 {
173 compatible = "pci14c3,7662";
174 reg = <0x0000 0 0 0 0>;
175 nvmem-cells = <&eeprom_factory_8000>;
176 nvmem-cell-names = "eeprom";
177 ieee80211-freq-limit = <5000000 6000000>;
178 };
179 };
180
181 &ehci {
182 status = "okay";
183 };
184
185 &ohci {
186 status = "okay";
187 };