target/linux/ramips/dts/mt7620a_wavlink_wl-wn579x3.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "wavlink,wl-wn579x3", "ralink,mt7620a-soc";
  10         model = "Wavlink WL-WN579X3";
  11
  12         aliases {
  13                 led-boot = &led_wps;
  14                 led-failsafe = &led_wps;
  15                 led-running = &led_wps;
  16                 led-upgrade = &led_wps;
  17         };
  18
  19         keys {
  20                 compatible = "gpio-keys";
  21
  22                 reset {
  23                         label = "reset";
  24                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  25                         linux,code = <KEY_RESTART>;
  26                 };
  27
  28                 wps {
  29                         label = "wps";
  30                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  31                         linux,code = <KEY_WPS_BUTTON>;
  32                 };
  33
  34                 switch_aps {
  35                         label = "mode_aps";
  36                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  37                         linux,code = <BTN_1>;
  38                         linux,input-type = <EV_SW>;
  39                 };
  40
  41                 switch_repeater {
  42                         label = "mode_repeater";
  43                         gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
  44                         linux,code = <BTN_0>;
  45                         linux,input-type = <EV_SW>;
  46                 };
  47         };
  48
  49         leds {
  50                 compatible = "gpio-leds";
  51
  52                 led_wps: wps {
  53                         label = "blue:wps";
  54                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  55                 };
  56
  57                 lan {
  58                         label = "blue:lan";
  59                         gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
  60                 };
  61
  62                 wan {
  63                         label = "blue:wan";
  64                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  65                 };
  66
  67                 wifi {
  68                         label = "blue:wifi";
  69                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  70                 };
  71
  72                 /* These three form the signal wifi strength segments */
  73                 wifi_high {
  74                         label = "blue:wifi_high";
  75                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  76                 };
  77
  78                 wifi_medium {
  79                         label = "blue:wifi_medium";
  80                         gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  81                 };
  82
  83                 wifi_low {
  84                         label = "blue:wifi_low";
  85                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  86                 };
  87         };
  88 };
  89
  90 &gpio2 {
  91         status = "okay";
  92 };
  93
  94 &gpio3 {
  95         status = "okay";
  96 };
  97
  98 &spi0 {
  99         status = "okay";
 100
 101         flash@0 {
 102                 compatible = "jedec,spi-nor";
 103                 reg = <0>;
 104                 spi-max-frequency = <50000000>;
 105
 106                 partitions {
 107                         compatible = "fixed-partitions";
 108                         #address-cells = <1>;
 109                         #size-cells = <1>;
 110
 111                         partition@0 {
 112                                 label = "u-boot";
 113                                 reg = <0x0 0x30000>;
 114                                 read-only;
 115                         };
 116
 117                         partition@30000 {
 118                                 label = "config";
 119                                 reg = <0x30000 0x10000>;
 120                                 read-only;
 121                         };
 122
 123                         factory: partition@40000 {
 124                                 compatible = "nvmem-cells";
 125                                 label = "factory";
 126                                 reg = <0x40000 0x10000>;
 127                                 #address-cells = <1>;
 128                                 #size-cells = <1>;
 129                                 read-only;
 130
 131                                 eeprom_factory_0: eeprom@0 {
 132                                         reg = <0x0 0x200>;
 133                                 };
 134
 135                                 macaddr_factory_28: macaddr@28 {
 136                                         reg = <0x28 0x6>;
 137                                 };
 138                         };
 139
 140                         partition@50000 {
 141                                 compatible = "denx,uimage";
 142                                 label = "firmware";
 143                                 reg = <0x50000 0x790000>;
 144                         };
 145
 146                         partition@7e0000 {
 147                                 label = "board_data";
 148                                 reg = <0x7e0000 0x10000>;
 149                                 read-only;
 150                         };
 151
 152                         partition@7f0000 {
 153                                 label = "nvram";
 154                                 reg = <0x7f0000 0x10000>;
 155                                 read-only;
 156                         };
 157                 };
 158         };
 159 };
 160
 161 &pcie {
 162         status = "okay";
 163 };
 164
 165 &pcie0 {
 166         wifi@0,0 {
 167                 reg = <0x0000 0 0 0 0>;
 168                 mediatek,mtd-eeprom = <&factory 0x8000>;
 169                 ieee80211-freq-limit = <5000000 6000000>;
 170         };
 171 };
 172
 173 &ethernet {
 174         pinctrl-names = "default";
 175         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 176
 177         nvmem-cells = <&macaddr_factory_28>;
 178         nvmem-cell-names = "mac-address";
 179
 180         mediatek,portmap = "llllw";
 181
 182         port@4 {
 183                 status = "okay";
 184                 phy-handle = <&phy4>;
 185                 phy-mode = "rgmii";
 186         };
 187
 188         port@5 {
 189                 status = "okay";
 190                 phy-handle = <&phy5>;
 191                 phy-mode = "rgmii";
 192         };
 193
 194         mdio-bus {
 195                 status = "okay";
 196
 197                 phy4: ethernet-phy@4 {
 198                         reg = <4>;
 199                         phy-mode = "rgmii";
 200                 };
 201
 202                 phy5: ethernet-phy@5 {
 203                         reg = <5>;
 204                         phy-mode = "rgmii";
 205                 };
 206         };
 207 };
 208
 209 &gsw {
 210         mediatek,port4-gmac;
 211         mediatek,ephy-base = /bits/ 8 <8>;
 212 };
 213
 214 &wmac {
 215         nvmem-cells = <&eeprom_factory_0>;
 216         nvmem-cell-names = "eeprom";
 217 };
 218
 219 &state_default {
 220         gpio {
 221                 groups = "ephy", "i2c", "wled", "uartf";
 222                 function = "gpio";
 223         };
 224 };