6 compatible = "ralink,mt7620n-soc";
19 compatible = "mips,mips24KEc";
25 bootargs = "console=ttyS0,57600";
30 #interrupt-cells = <1>;
32 compatible = "mti,cpu-interrupt-controller";
35 palmbus: palmbus@10000000 {
36 compatible = "palmbus";
37 reg = <0x10000000 0x200000>;
38 ranges = <0x0 0x10000000 0x1FFFFF>;
44 compatible = "ralink,mt7620-sysc", "syscon";
51 compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
56 interrupt-parent = <&intc>;
60 watchdog: watchdog@120 {
61 compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
69 interrupt-parent = <&intc>;
74 compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
78 #interrupt-cells = <1>;
80 interrupt-parent = <&cpuintc>;
85 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
88 interrupt-parent = <&intc>;
93 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
96 interrupt-parent = <&intc>;
103 ralink,gpio-base = <0>;
104 ralink,register-map = [ 00 04 08 0c
110 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
113 interrupt-parent = <&intc>;
120 ralink,gpio-base = <24>;
121 ralink,register-map = [ 00 04 08 0c
129 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
132 interrupt-parent = <&intc>;
139 ralink,gpio-base = <40>;
140 ralink,register-map = [ 00 04 08 0c
148 compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
151 interrupt-parent = <&intc>;
158 ralink,gpio-base = <72>;
159 ralink,register-map = [ 00 04 08 0c
167 compatible = "ralink,rt2880-i2c";
175 #address-cells = <1>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&i2c_pins>;
185 compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
193 #address-cells = <1>;
198 pinctrl-names = "default";
199 pinctrl-0 = <&spi_pins>;
203 compatible = "ralink,rt2880-spi";
211 #address-cells = <1>;
216 pinctrl-names = "default";
217 pinctrl-0 = <&spi_cs1>;
220 uartlite: uartlite@c00 {
221 compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
228 interrupt-parent = <&intc>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&uartlite_pins>;
237 systick: systick@d00 {
238 compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
241 interrupt-parent = <&cpuintc>;
247 compatible = "ralink,rt2880-pinmux";
248 pinctrl-names = "default";
249 pinctrl-0 = <&state_default>;
251 state_default: pinctrl0 {
270 groups = "spi refclk";
271 function = "spi refclk";
282 uartlite_pins: uartlite {
285 function = "uartlite";
291 compatible = "mediatek,mt7620-usbphy";
294 ralink,sysctl = <&sysc>;
295 /* usb phy reset is only controled by RSTCTRL bit 25 */
296 resets = <&sysc 25>, <&sysc 22>;
297 reset-names = "host", "device";
300 ethernet: ethernet@10100000 {
301 compatible = "mediatek,mt7620-eth";
302 reg = <0x10100000 0x10000>;
304 #address-cells = <1>;
307 interrupt-parent = <&cpuintc>;
310 resets = <&sysc 21>, <&sysc 23>;
311 reset-names = "fe", "esw";
313 mediatek,switch = <&gsw>;
317 compatible = "mediatek,mt7620-gsw";
318 reg = <0x10110000 0x8000>;
321 reset-names = "ephy";
323 interrupt-parent = <&intc>;
327 ehci: ehci@101c0000 {
328 #address-cells = <1>;
330 compatible = "generic-ehci";
331 reg = <0x101c0000 0x1000>;
333 interrupt-parent = <&intc>;
343 #trigger-source-cells = <0>;
347 ohci: ohci@101c1000 {
348 #address-cells = <1>;
350 compatible = "generic-ohci";
351 reg = <0x101c1000 0x1000>;
356 interrupt-parent = <&intc>;
363 #trigger-source-cells = <0>;
367 wmac: wmac@10180000 {
368 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
369 reg = <0x10180000 0x40000>;
373 interrupt-parent = <&cpuintc>;
376 ralink,eeprom = "soc_wmac.eeprom";