3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
8 label-mac-device = &gmac0;
12 compatible = "gpio-keys";
16 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
17 linux,code = <KEY_RESTART>;
23 nvmem-cells = <&macaddr_factory_22>;
24 nvmem-cell-names = "mac-address";
38 nvmem-cells = <&macaddr_factory_22>;
39 nvmem-cell-names = "mac-address";
40 mac-address-increment = <1>;
46 nvmem-cells = <&macaddr_factory_22>;
47 nvmem-cell-names = "mac-address";
48 mac-address-increment = <2>;
54 nvmem-cells = <&macaddr_factory_22>;
55 nvmem-cell-names = "mac-address";
56 mac-address-increment = <3>;
62 nvmem-cells = <&macaddr_factory_22>;
63 nvmem-cell-names = "mac-address";
64 mac-address-increment = <4>;
73 compatible = "fixed-partitions";
85 reg = <0x80000 0x60000>;
89 factory: partition@e0000 {
91 reg = <0xe0000 0x60000>;
96 reg = <0x140000 0x300000>;
101 reg = <0x440000 0x300000>;
106 reg = <0x740000 0xf7c0000>;
113 groups = "uart2", "uart3", "pcie", "jtag";
120 * This board has 2Mb spi flash soldered in and visible
121 * from manufacturer's firmware.
122 * But this SoC shares spi and nand pins,
123 * and current driver doesn't handle this sharing well
128 compatible = "jedec,spi-nor";
130 spi-max-frequency = <10000000>;
133 compatible = "fixed-partitions";
134 #address-cells = <1>;
139 reg = <0x0 0x200000>;
151 compatible = "nvmem-cells";
152 #address-cells = <1>;
155 macaddr_factory_22: macaddr@22 {