3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
8 label-mac-device = &gmac0;
12 compatible = "gpio-keys";
16 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
17 linux,code = <KEY_RESTART>;
23 pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
27 nvmem-cells = <&macaddr_factory_22>;
28 nvmem-cell-names = "mac-address";
42 nvmem-cells = <&macaddr_factory_22>;
43 nvmem-cell-names = "mac-address";
44 mac-address-increment = <1>;
50 nvmem-cells = <&macaddr_factory_22>;
51 nvmem-cell-names = "mac-address";
52 mac-address-increment = <2>;
58 nvmem-cells = <&macaddr_factory_22>;
59 nvmem-cell-names = "mac-address";
60 mac-address-increment = <3>;
66 nvmem-cells = <&macaddr_factory_22>;
67 nvmem-cell-names = "mac-address";
68 mac-address-increment = <4>;
77 compatible = "fixed-partitions";
89 reg = <0x80000 0x60000>;
93 factory: partition@e0000 {
95 reg = <0xe0000 0x60000>;
100 reg = <0x140000 0x300000>;
105 reg = <0x440000 0x300000>;
110 reg = <0x740000 0xf7c0000>;
117 groups = "uart2", "uart3", "pcie", "rgmii2", "jtag";
124 * This board has 2Mb spi flash soldered in and visible
125 * from manufacturer's firmware.
126 * But this SoC shares spi and nand pins,
127 * and current driver doesn't handle this sharing well
132 compatible = "jedec,spi-nor";
134 spi-max-frequency = <10000000>;
137 compatible = "fixed-partitions";
138 #address-cells = <1>;
143 reg = <0x0 0x200000>;
155 compatible = "nvmem-cells";
156 #address-cells = <1>;
159 macaddr_factory_22: macaddr@22 {