target/linux/ramips/dts/mt7621_ubnt_edgerouter-x.dtsi

   1 #include "mt7621.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5
   6 / {
   7         aliases {
   8                 label-mac-device = &gmac0;
   9         };
  10
  11         keys {
  12                 compatible = "gpio-keys";
  13
  14                 reset {
  15                         label = "reset";
  16                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  17                         linux,code = <KEY_RESTART>;
  18                 };
  19         };
  20 };
  21
  22 &gmac0 {
  23         nvmem-cells = <&macaddr_factory_22>;
  24         nvmem-cell-names = "mac-address";
  25         label = "dsa";
  26 };
  27
  28 &switch0 {
  29         ports {
  30                 port@0 {
  31                         status = "okay";
  32                         label = "eth0";
  33                 };
  34
  35                 port@1 {
  36                         status = "okay";
  37                         label = "eth1";
  38                         nvmem-cells = <&macaddr_factory_22>;
  39                         nvmem-cell-names = "mac-address";
  40                         mac-address-increment = <1>;
  41                 };
  42
  43                 port@2 {
  44                         status = "okay";
  45                         label = "eth2";
  46                         nvmem-cells = <&macaddr_factory_22>;
  47                         nvmem-cell-names = "mac-address";
  48                         mac-address-increment = <2>;
  49                 };
  50
  51                 port@3 {
  52                         status = "okay";
  53                         label = "eth3";
  54                         nvmem-cells = <&macaddr_factory_22>;
  55                         nvmem-cell-names = "mac-address";
  56                         mac-address-increment = <3>;
  57                 };
  58
  59                 port@4 {
  60                         status = "okay";
  61                         label = "eth4";
  62                         nvmem-cells = <&macaddr_factory_22>;
  63                         nvmem-cell-names = "mac-address";
  64                         mac-address-increment = <4>;
  65                 };
  66         };
  67 };
  68
  69 &nand {
  70         status = "okay";
  71
  72         partitions {
  73                 compatible = "fixed-partitions";
  74                 #address-cells = <1>;
  75                 #size-cells = <1>;
  76
  77                 partition@0 {
  78                         label = "u-boot";
  79                         reg = <0x0 0x80000>;
  80                         read-only;
  81                 };
  82
  83                 partition@80000 {
  84                         label = "u-boot-env";
  85                         reg = <0x80000 0x60000>;
  86                         read-only;
  87                 };
  88
  89                 factory: partition@e0000 {
  90                         label = "factory";
  91                         reg = <0xe0000 0x60000>;
  92                 };
  93
  94                 partition@140000 {
  95                         label = "kernel1";
  96                         reg = <0x140000 0x300000>;
  97                 };
  98
  99                 partition@440000 {
 100                         label = "kernel2";
 101                         reg = <0x440000 0x300000>;
 102                 };
 103
 104                 partition@740000 {
 105                         label = "ubi";
 106                         reg = <0x740000 0xf7c0000>;
 107                 };
 108         };
 109 };
 110
 111 &state_default {
 112         gpio {
 113                 groups = "uart2", "uart3", "pcie", "rgmii2", "jtag";
 114                 function = "gpio";
 115         };
 116 };
 117
 118 &spi0 {
 119         /*
 120          * This board has 2Mb spi flash soldered in and visible
 121          * from manufacturer's firmware.
 122          * But this SoC shares spi and nand pins,
 123          * and current driver doesn't handle this sharing well
 124          */
 125         status = "disabled";
 126
 127         flash@1 {
 128                 compatible = "jedec,spi-nor";
 129                 reg = <1>;
 130                 spi-max-frequency = <10000000>;
 131
 132                 partitions {
 133                         compatible = "fixed-partitions";
 134                         #address-cells = <1>;
 135                         #size-cells = <1>;
 136
 137                         partition@0 {
 138                                 label = "spi";
 139                                 reg = <0x0 0x200000>;
 140                                 read-only;
 141                         };
 142                 };
 143         };
 144 };
 145
 146 &xhci {
 147         status = "disabled";
 148 };
 149
 150 &factory {
 151         compatible = "nvmem-cells";
 152         #address-cells = <1>;
 153         #size-cells = <1>;
 154
 155         macaddr_factory_22: macaddr@22 {
 156                 reg = <0x22 0x6>;
 157         };
 158 };