target/linux/ramips/dts/mt7628an.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "ralink,mtk7628an-soc";
   5
   6         cpus {
   7                 cpu@0 {
   8                         compatible = "mips,mips24KEc";
   9                 };
  10         };
  11
  12         chosen {
  13                 bootargs = "console=ttyS0,57600";
  14         };
  15
  16         cpuintc: cpuintc@0 {
  17                 #address-cells = <0>;
  18                 #interrupt-cells = <1>;
  19                 interrupt-controller;
  20                 compatible = "mti,cpu-interrupt-controller";
  21         };
  22
  23         palmbus@10000000 {
  24                 compatible = "palmbus";
  25                 reg = <0x10000000 0x200000>;
  26                 ranges = <0x0 0x10000000 0x1FFFFF>;
  27
  28                 #address-cells = <1>;
  29                 #size-cells = <1>;
  30
  31                 sysc@0 {
  32                         compatible = "ralink,mt7620a-sysc";
  33                         reg = <0x0 0x100>;
  34                 };
  35
  36                 watchdog@120 {
  37                         compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
  38                         reg = <0x120 0x10>;
  39
  40                         resets = <&rstctrl 8>;
  41                         reset-names = "wdt";
  42
  43                         interrupt-parent = <&intc>;
  44                         interrupts = <24>;
  45                 };
  46
  47                 intc: intc@200 {
  48                         compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
  49                         reg = <0x200 0x100>;
  50
  51                         resets = <&rstctrl 9>;
  52                         reset-names = "intc";
  53
  54                         interrupt-controller;
  55                         #interrupt-cells = <1>;
  56
  57                         interrupt-parent = <&cpuintc>;
  58                         interrupts = <2>;
  59
  60                         ralink,intc-registers = <0x9c 0xa0
  61                                                  0x6c 0xa4
  62                                                  0x80 0x78>;
  63                 };
  64
  65                 memc@300 {
  66                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  67                         reg = <0x300 0x100>;
  68
  69                         resets = <&rstctrl 20>;
  70                         reset-names = "mc";
  71
  72                         interrupt-parent = <&intc>;
  73                         interrupts = <3>;
  74                 };
  75
  76                 gpio@600 {
  77                         #address-cells = <1>;
  78                         #size-cells = <0>;
  79
  80                         compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
  81                         reg = <0x600 0x100>;
  82
  83                         gpio0: bank@0 {
  84                                 reg = <0>;
  85                                 compatible = "mtk,mt7621-gpio-bank";
  86                                 gpio-controller;
  87                                 #gpio-cells = <2>;
  88                         };
  89
  90                         gpio1: bank@1 {
  91                                 reg = <1>;
  92                                 compatible = "mtk,mt7621-gpio-bank";
  93                                 gpio-controller;
  94                                 #gpio-cells = <2>;
  95                         };
  96
  97                         gpio2: bank@2 {
  98                                 reg = <2>;
  99                                 compatible = "mtk,mt7621-gpio-bank";
 100                                 gpio-controller;
 101                                 #gpio-cells = <2>;
 102                         };
 103                 };
 104
 105                 spi@b00 {
 106                         compatible = "ralink,mt7621-spi";
 107                         reg = <0xb00 0x100>;
 108
 109                         resets = <&rstctrl 18>;
 110                         reset-names = "spi";
 111
 112                         #address-cells = <1>;
 113                         #size-cells = <1>;
 114
 115                         pinctrl-names = "default";
 116                         pinctrl-0 = <&spi_pins>;
 117
 118                         status = "disabled";
 119                 };
 120
 121                 uartlite@c00 {
 122                         compatible = "ns16550a";
 123                         reg = <0xc00 0x100>;
 124
 125                         reg-shift = <2>;
 126                         reg-io-width = <4>;
 127                         no-loopback-test;
 128
 129                         resets = <&rstctrl 12>;
 130                         reset-names = "uartl";
 131
 132                         interrupt-parent = <&intc>;
 133                         interrupts = <20>;
 134
 135                         pinctrl-names = "default";
 136                         pinctrl-0 = <&uart0_pins>;
 137                 };
 138
 139                 uart1@d00 {
 140                         compatible = "ns16550a";
 141                         reg = <0xd00 0x100>;
 142
 143                         reg-shift = <2>;
 144                         reg-io-width = <4>;
 145                         no-loopback-test;
 146
 147                         resets = <&rstctrl 19>;
 148                         reset-names = "uart1";
 149
 150                         interrupt-parent = <&intc>;
 151                         interrupts = <21>;
 152
 153                         pinctrl-names = "default";
 154                         pinctrl-0 = <&uart1_pins>;
 155
 156                         status = "disabled";
 157                 };
 158
 159                 uart2@e00 {
 160                         compatible = "ns16550a";
 161                         reg = <0xe00 0x100>;
 162
 163                         reg-shift = <2>;
 164                         reg-io-width = <4>;
 165                         no-loopback-test;
 166
 167                         resets = <&rstctrl 20>;
 168                         reset-names = "uart2";
 169
 170                         interrupt-parent = <&intc>;
 171                         interrupts = <22>;
 172
 173                         pinctrl-names = "default";
 174                         pinctrl-0 = <&uart2_pins>;
 175
 176                         status = "disabled";
 177                 };
 178         };
 179
 180         pinctrl {
 181                 compatible = "ralink,rt2880-pinmux";
 182                 pinctrl-names = "default";
 183                 pinctrl-0 = <&state_default>;
 184
 185                 state_default: pinctrl0 {
 186                 };
 187
 188                 spi_pins: spi {
 189                         spi {
 190                                 ralink,group = "spi";
 191                                 ralink,function = "spi";
 192                         };
 193                 };
 194
 195                 uart0_pins: uartlite {
 196                         uartlite {
 197                                 ralink,group = "uart0";
 198                                 ralink,function = "uart0";
 199                         };
 200                 };
 201
 202                 uart1_pins: uart1 {
 203                         uart1 {
 204                                 ralink,group = "uart1";
 205                                 ralink,function = "uart1";
 206                         };
 207                 };
 208
 209                 uart2_pins: uart2 {
 210                         uart2 {
 211                                 ralink,group = "uart2";
 212                                 ralink,function = "uart2";
 213                         };
 214                 };
 215
 216                 sdxc_pins: sdxc {
 217                         sdxc {
 218                                 ralink,group = "sdmode";
 219                                 ralink,function = "sdxc";
 220                         };
 221                 };
 222         };
 223
 224         rstctrl: rstctrl {
 225                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 226                 #reset-cells = <1>;
 227         };
 228
 229         usbphy: usbphy {
 230                 compatible = "ralink,mt7628an-usbphy", "ralink,mt7620a-usbphy";
 231                 #phy-cells = <1>;
 232
 233                 resets = <&rstctrl 22>;
 234                 reset-names = "host";
 235         };
 236
 237         sdhci@10130000 {
 238                 compatible = "ralink,mt7620-sdhci";
 239                 reg = <0x10130000 4000>;
 240
 241                 interrupt-parent = <&intc>;
 242                 interrupts = <14>;
 243
 244                 pinctrl-names = "default";
 245                 pinctrl-0 = <&sdxc_pins>;
 246
 247                 status = "disabled";
 248         };
 249
 250         ehci@101c0000 {
 251                 compatible = "ralink,rt3xxx-ehci";
 252                 reg = <0x101c0000 0x1000>;
 253
 254                 phys = <&usbphy 1>;
 255                 phy-names = "usb";
 256
 257                 interrupt-parent = <&intc>;
 258                 interrupts = <18>;
 259         };
 260
 261         ohci@101c1000 {
 262                 compatible = "ralink,rt3xxx-ohci";
 263                 reg = <0x101c1000 0x1000>;
 264
 265                 phys = <&usbphy 1>;
 266                 phy-names = "usb";
 267
 268                 interrupt-parent = <&intc>;
 269                 interrupts = <18>;
 270         };
 271
 272         ethernet@10100000 {
 273                 compatible = "ralink,rt5350-eth";
 274                 reg = <0x10100000 10000>;
 275
 276                 interrupt-parent = <&cpuintc>;
 277                 interrupts = <5>;
 278
 279                 resets = <&rstctrl 21 &rstctrl 23>;
 280                 reset-names = "fe", "esw";
 281         };
 282
 283         esw@10110000 {
 284                 compatible = "ralink,rt3050-esw";
 285                 reg = <0x10110000 8000>;
 286
 287                 resets = <&rstctrl 23>;
 288                 reset-names = "esw";
 289
 290                 interrupt-parent = <&intc>;
 291                 interrupts = <17>;
 292         };
 293
 294         pcie@10140000 {
 295                 compatible = "mediatek,mt7620-pci";
 296                 reg = <0x10140000 0x100
 297                         0x10142000 0x100>;
 298
 299                 #address-cells = <3>;
 300                 #size-cells = <2>;
 301
 302                 resets = <&rstctrl 26>;
 303                 reset-names = "pcie0";
 304
 305                 interrupt-parent = <&cpuintc>;
 306                 interrupts = <4>;
 307
 308                 status = "disabled";
 309
 310                 device_type = "pci";
 311
 312                 bus-range = <0 255>;
 313                 ranges = <
 314                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 315                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 316                 >;
 317
 318                 pcie-bridge {
 319                         reg = <0x0000 0 0 0 0>;
 320
 321                         #address-cells = <3>;
 322                         #size-cells = <2>;
 323
 324                         device_type = "pci";
 325                 };
 326         };
 327 };