6 compatible = "mediatek,mt7628an-soc";
17 compatible = "mips,mips24KEc";
23 bootargs = "console=ttyS0,57600";
28 #interrupt-cells = <1>;
30 compatible = "mti,cpu-interrupt-controller";
33 palmbus: palmbus@10000000 {
34 compatible = "palmbus";
35 reg = <0x10000000 0x200000>;
36 ranges = <0x0 0x10000000 0x1FFFFF>;
42 compatible = "ralink,mt7620a-sysc", "syscon";
46 watchdog: watchdog@100 {
47 compatible = "ralink,mt7628an-wdt", "mediatek,mt7621-wdt";
50 resets = <&rstctrl 8>;
53 interrupt-parent = <&intc>;
58 compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
61 resets = <&rstctrl 9>;
65 #interrupt-cells = <1>;
67 interrupt-parent = <&cpuintc>;
70 ralink,intc-registers = <0x9c 0xa0
76 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
79 resets = <&rstctrl 20>;
82 interrupt-parent = <&intc>;
87 compatible = "mediatek,mt7621-gpio";
90 interrupt-parent = <&intc>;
93 #interrupt-cells = <2>;
101 compatible = "mediatek,mt7621-i2c";
104 resets = <&rstctrl 16>;
107 #address-cells = <1>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&i2c_pins>;
117 compatible = "mediatek,mt7628-i2s";
120 resets = <&rstctrl 17>;
123 interrupt-parent = <&intc>;
131 dma-names = "tx", "rx";
137 compatible = "ralink,mt7621-spi";
140 resets = <&rstctrl 18>;
143 #address-cells = <1>;
146 pinctrl-names = "default";
147 pinctrl-0 = <&spi_pins>;
152 uartlite: uartlite@c00 {
153 compatible = "ns16550a";
160 clock-frequency = <40000000>;
162 resets = <&rstctrl 12>;
163 reset-names = "uartl";
165 interrupt-parent = <&intc>;
168 pinctrl-names = "default";
169 pinctrl-0 = <&uart0_pins>;
173 compatible = "ns16550a";
180 clock-frequency = <40000000>;
182 resets = <&rstctrl 19>;
183 reset-names = "uart1";
185 interrupt-parent = <&intc>;
188 pinctrl-names = "default";
189 pinctrl-0 = <&uart1_pins>;
195 compatible = "ns16550a";
202 clock-frequency = <40000000>;
204 resets = <&rstctrl 20>;
205 reset-names = "uart2";
207 interrupt-parent = <&intc>;
210 pinctrl-names = "default";
211 pinctrl-0 = <&uart2_pins>;
217 compatible = "mediatek,mt7628-pwm";
218 reg = <0x5000 0x1000>;
221 resets = <&rstctrl 31>;
224 pinctrl-names = "default";
225 pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
231 compatible = "ralink,mt7620a-pcm";
232 reg = <0x2000 0x800>;
234 resets = <&rstctrl 11>;
237 interrupt-parent = <&intc>;
244 compatible = "ralink,rt3883-gdma";
245 reg = <0x2800 0x800>;
247 resets = <&rstctrl 14>;
250 interrupt-parent = <&intc>;
254 #dma-channels = <16>;
255 #dma-requests = <16>;
262 compatible = "ralink,rt2880-pinmux";
263 pinctrl-names = "default";
264 pinctrl-0 = <&state_default>;
266 state_default: pinctrl0 {
276 spi_cs1_pins: spi_cs1 {
279 function = "spi cs1";
297 uart0_pins: uartlite {
339 pcm_i2s_pins: pcm_i2s {
346 refclk_pins: refclk {
355 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
360 compatible = "ralink,rt2880-clock";
364 usbphy: usbphy@10120000 {
365 compatible = "mediatek,mt7628-usbphy", "mediatek,mt7620-usbphy";
366 reg = <0x10120000 0x1000>;
369 ralink,sysctl = <&sysc>;
370 resets = <&rstctrl 22 &rstctrl 25>;
371 reset-names = "host", "device";
372 clocks = <&clkctrl 22 &clkctrl 25>;
373 clock-names = "host", "device";
376 sdhci: sdhci@10130000 {
377 compatible = "ralink,mt7620-sdhci";
378 reg = <0x10130000 0x4000>;
380 interrupt-parent = <&intc>;
383 pinctrl-names = "default";
384 pinctrl-0 = <&sdxc_pins>;
389 ehci: ehci@101c0000 {
390 #address-cells = <1>;
392 compatible = "generic-ehci";
393 reg = <0x101c0000 0x1000>;
398 interrupt-parent = <&intc>;
403 #trigger-source-cells = <0>;
407 ohci: ohci@101c1000 {
408 #address-cells = <1>;
410 compatible = "generic-ohci";
411 reg = <0x101c1000 0x1000>;
416 interrupt-parent = <&intc>;
421 #trigger-source-cells = <0>;
425 ethernet: ethernet@10100000 {
426 compatible = "ralink,rt5350-eth";
427 reg = <0x10100000 0x10000>;
429 interrupt-parent = <&cpuintc>;
432 resets = <&rstctrl 21>;
435 mediatek,switch = <&esw>;
439 compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
440 reg = <0x10110000 0x8000>;
442 resets = <&rstctrl 23 &rstctrl 24>;
443 reset-names = "esw", "ephy";
445 interrupt-parent = <&intc>;
449 pcie: pcie@10140000 {
450 compatible = "mediatek,mt7620-pci";
451 reg = <0x10140000 0x100
454 #address-cells = <3>;
457 interrupt-parent = <&cpuintc>;
460 resets = <&rstctrl 26 &rstctrl 27>;
461 reset-names = "pcie0", "pcie1";
462 clocks = <&clkctrl 26 &clkctrl 27>;
463 clock-names = "pcie0", "pcie1";
471 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
472 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
476 reg = <0x0000 0 0 0 0>;
478 #address-cells = <3>;
487 wmac: wmac@10300000 {
488 compatible = "mediatek,mt7628-wmac";
489 reg = <0x10300000 0x100000>;
491 interrupt-parent = <&cpuintc>;